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git01.mediatek.com / filogic / atf / b4bcc1d3e2b7371912c00e2dc05b3f5116559f07 / plat / rockchip / rk3399 / drivers / soc / soc.h
  1. 93280b7 rk3399: dram: use PMU M0 to do ddr frequency scaling by Xing Zheng · 8 years ago
  2. 73dfd2e utils: move BIT(n) macro to utils.h by Masahiro Yamada · 8 years ago
  3. 667e484 rockchip: remove no needed code for rk3399 by Caesar Wang · 8 years ago
  4. 813a89a rockchip: disable watchdog during suspend by Caesar Wang · 8 years ago
  5. 5339d18 rockchip: close the PD center logic during suspend by Caesar Wang · 8 years ago
  6. f33eb2c rockchip: add support save/restore configuration for DDR during enter S3 by Caesar Wang · 8 years ago
  7. c9ed717 Merge pull request #724 from rockchip-linux/support-rk3399-sdram by davidcunado-arm · 8 years ago
  8. bb22862 rockchip: clear the power mode status via M0 by Caesar Wang · 8 years ago
  9. a883702 rockchip: fixes the wrong CLKSEL_CON count for CRU by Caesar Wang · 8 years ago
  10. 47e157c rockchip: fixes the clock select and divide register for rk3399 by Caesar Wang · 8 years ago
  11. 9740bba rockchip: rk3399: add dram driver by Caesar Wang · 8 years ago
  12. ed6b9a5 rockchip: update to handle PWMs for rk3399 by Caesar Wang · 8 years ago
  13. 42e113e rockchip: support the suspend/resume for rk3399 by Tony Xie · 8 years ago
  14. 038f6aa rockchip: support rk3399 gpio driver by Caesar Wang · 8 years ago
  15. 59e41b5 rockchip: support the suspend/resume for rk3399 by Caesar Wang · 9 years ago
  16. f6118cc Support for Rockchip's family SoCs by Tony Xie · 9 years ago