Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / b456f74fded470dd8918e7cf3a39f4c3c245fc32 / plat / intel / soc / common / socfpga_delay_timer.c
  1. 2f2b61c fix(intel): remove unused printout by Sieu Mun Tang · Fri May 13 16:42:42 2022 +0800
  2. a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · Wed Apr 06 10:19:16 2022 +0800
  3. 64d2b2f plat: intel: Additional instruction required to enable global timer by Tien Hock Loh · Mon May 11 01:12:03 2020 -0700
  4. 6a240c7 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 15:21:20 2019 +0800[Renamed (87%) from plat/intel/soc/agilex/socfpga_delay_timer.c]
  5. 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · Thu Jun 27 11:34:03 2019 +0800