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git01.mediatek.com / filogic / atf / b44eda5a20d1c84f73f1a493189a5256686a70cd / plat / nvidia
  1. a9002bb Tegra186: fix programming sequence for SC7/SC8 entry by Varun Wadekar · 9 years ago
  2. 698e7c6 Tegra186: program default core wake mask during CPU_SUSPEND by Varun Wadekar · 9 years ago
  3. 920fce8 Tegra186: clear the system cstate for offline core by Varun Wadekar · 9 years ago
  4. 9610573 Tegra: memctrl_v2: enable APE overrides for chip verification by Varun Wadekar · 9 years ago
  5. ad2824f Tegra186: mce: enable LATIC for chip verification by Varun Wadekar · 9 years ago
  6. 93bed2a Tegra186: save/restore BL31 context to/from TZDRAM by Varun Wadekar · 9 years ago
  7. a0f2697 Tegra186: re-configure MSS' client settings by Varun Wadekar · 9 years ago
  8. b877615 Tegra186: implement support for System Suspend by Varun Wadekar · 9 years ago
  9. 87e44ff Tegra186: memctrl_v2: restore video memory settings by Varun Wadekar · 9 years ago
  10. 3c95993 Tegra186: smmu: driver for the smmu hardware block by Varun Wadekar · 9 years ago
  11. 2bb9f47 Tegra: replace ASM signed tests with unsigned by Douglas Raillard · 8 years ago
  12. d66ee54 Tegra186: implement quasi power off (SC8) state by Varun Wadekar · 9 years ago
  13. e26a55a Tegra186: disable DCO operations for PSCI_CPU_OFF by Varun Wadekar · 9 years ago
  14. cad7b08 Tegra186: register FIQ interrupt sources by Varun Wadekar · 9 years ago
  15. 6c5b98f Tegra: memctrl_v2: set NO_OVERRIDE for APE clients by Varun Wadekar · 9 years ago
  16. c9ac3e4 Tegra: memctrl_v2: implement MC txn override WAR by Varun Wadekar · 9 years ago
  17. e60f1bf Tegra: memctrl_v2: check GPU state before VPR programming by Varun Wadekar · 9 years ago
  18. de729d6 Tegra: memctrl_v2: no SID override for SCE block by Varun Wadekar · 9 years ago
  19. 8964509 Tegra186: fix per-cpu wake times for CPU power states by Varun Wadekar · 9 years ago
  20. a7c1ea7 Tegra186: add Video memory carveout settings by Varun Wadekar · 9 years ago
  21. 4223657 Tegra186: support for C6/C7 CPU_SUSPEND states by Varun Wadekar · 9 years ago
  22. 13e7dc4 Tegra: memctrl_v2: secure the on-chip TZSRAM memory by Varun Wadekar · 9 years ago
  23. c2c3a2a Tegra186: support for the latest platform port handlers by Varun Wadekar · 9 years ago
  24. 38020c9 Tegra186: implement prepare_system_reset handler by Varun Wadekar · 9 years ago
  25. a64806a Tegra186: implement CPU_OFF handler by Varun Wadekar · 9 years ago
  26. 20c9429 Tegra186: update SYSCNT_FREQ to 31.25MHz by Varun Wadekar · 9 years ago
  27. 94d8532 Tegra186: relocate bl31.bin to the SYSRAM by Varun Wadekar · 9 years ago
  28. 782c83d Tegra186: implement prepare_system_off handler by Varun Wadekar · 8 years ago
  29. abd153c Tegra186: power on/off secondary CPUs by Varun Wadekar · 9 years ago
  30. 59c3aa0 Tegra186: SiP calls to interact with the MCE driver by Varun Wadekar · 9 years ago
  31. a0352ab Tegra186: mce: driver for the CPU complex power manager block by Varun Wadekar · 8 years ago
  32. 921b906 Tegra186: platform support for Tegra "T186" SoC by Varun Wadekar · 9 years ago
  33. cd5a2f5 Tegra: memctrl_v2: Memory Controller Driver (v2) by Varun Wadekar · 9 years ago
  34. fc9b91e Tegra: public interfaces to get the chip's major/minor versions by Varun Wadekar · 8 years ago
  35. 230011c Move plat/common source file definitions to generic Makefiles by dp-arm · 8 years ago
  36. 1108fc6 plat/tegra: Enable Cortex-A53 erratum 855873 workaround by Andre Przywara · 8 years ago
  37. ed3c62b Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs by Varun Wadekar · 8 years ago
  38. 3fb854f Tegra: enable SEPARATE_CODE_AND_RODATA build flag by Varun Wadekar · 8 years ago
  39. 20e9fef Tegra210: assert if afflvl0/1 have incorrect state-ids by Harvey Hsieh · 8 years ago
  40. e0f3dfd Tegra: SiP: 64-bit address for Video Memory base by Harvey Hsieh · 8 years ago
  41. 2c60b0a Tegra: increase ADDR_SPACE_SIZE to 35 bits by Steven Kao · 8 years ago
  42. 777baa5 Tegra: init the console only if the platform supports it by Damon Duan · 8 years ago
  43. 1edb882 Tegra210: new TZDRAM base address by Varun Wadekar · 8 years ago
  44. dba8007 Tegra210: set core power state during cluster power down by Varun Wadekar · 8 years ago
  45. 14eaede Tegra: calculate proper power state for affinity levels by Varun Wadekar · 8 years ago
  46. bfc6605 Tegra: fix logic to calculate GICD_ISPENDR register address by Varun Wadekar · 8 years ago
  47. a2c6be6 Tegra: uninit and re-init console across System Suspend by Varun Wadekar · 8 years ago
  48. 28dcc21 Tegra: support for silicon/simulation platforms by Varun Wadekar · 8 years ago
  49. f2aa1be Tegra: per-soc `get_target_pwr_state` handler by Varun Wadekar · 8 years ago
  50. b41a414 Tegra: relocate BL32 image to TZDRAM memory by Varun Wadekar · 8 years ago
  51. d22d4ad Tegra: get BL31 arguments from previous bootloader by Varun Wadekar · 8 years ago
  52. 197a75f Tegra: return BL32 entry point info if it is valid by Varun Wadekar · 8 years ago
  53. 5118b53 Tegra: configure TZDRAM fence during early setup by Varun Wadekar · 8 years ago
  54. d5f578a Tegra: restore TZRAM settings on "System Resume" by Varun Wadekar · 8 years ago
  55. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · 8 years ago
  56. c6c386d Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1 by Varun Wadekar · 8 years ago
  57. dc79930 Tegra: implement FIQ interrupt handler by Varun Wadekar · 9 years ago
  58. b7b4575 Tegra: GIC: enable FIQ interrupt handling by Varun Wadekar · 9 years ago
  59. 2497539 Tegra: implement common handler `plat_get_target_pwr_state()` by Varun Wadekar · 9 years ago
  60. 25e658e Tegra: include platform_def.h to access UART macros by Varun Wadekar · 9 years ago
  61. 2330edd Tegra: allow SiP smc calls from Secure World by Wayne Lin · 9 years ago
  62. 3f0a8ad Tegra: handler for per-soc early setup by Varun Wadekar · 9 years ago
  63. 1ec441e Tegra: relocate code to BL31_BASE during cold boot by Varun Wadekar · 9 years ago
  64. 79fa1a4 Tegra: Disable A57/A53 cache non-temporal hints by Varun Wadekar · 9 years ago
  65. d22429d Tegra: implement pwr_domain_pwr_down_wfi() handler by Varun Wadekar · 9 years ago
  66. d151363 Tegra: memmap BL31's TZDRAM carveout by Varun Wadekar · 9 years ago
  67. e032363 Tegra: increase BL31 image size to 256KB by Varun Wadekar · 9 years ago
  68. 6eec6d6 Tegra: allow individual SoCs to restore their settings by Varun Wadekar · 9 years ago
  69. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · 9 years ago
  70. 6077dce Tegra: enable PSCI extended state ID processing by Varun Wadekar · 9 years ago
  71. 3ce5499 Tegra: define platform power states by Varun Wadekar · 9 years ago
  72. 0dc9181 Tegra: drivers: memctrl: introduce function to secure on-chip TZRAM by Varun Wadekar · 9 years ago
  73. 1dcffa9 Tegra: enable runtime console by Varun Wadekar · 9 years ago
  74. e5caeed Tegra: PM: soc-specific system off handler by Varun Wadekar · 9 years ago
  75. 923d04a Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · 9 years ago
  76. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · 9 years ago
  77. 6bb6246 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · 9 years ago
  78. 7a9a285 Tegra: Memory Controller Driver (v1) by Varun Wadekar · 9 years ago
  79. baf903e Tegra: sanity check members of the "from_bl2" struct by Varun Wadekar · 9 years ago
  80. 39f87d1 Tegra: use ClusterId for calculating core position by Varun Wadekar · 9 years ago
  81. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · 9 years ago
  82. 97f2490 Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform by Varun Wadekar · 9 years ago
  83. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · 9 years ago
  84. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · 9 years ago
  85. a8954fc Replace some memset call by zeromem by Douglas Raillard · 8 years ago
  86. 21362a9 Introduce unified API to zero memory by Douglas Raillard · 8 years ago
  87. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  88. 0fac5af Move BL_COHERENT_RAM_BASE/END defines to common_def.h by Masahiro Yamada · 8 years ago
  89. 1723113 Migrate platform makefile to new console driver location by Soby Mathew · 8 years ago
  90. f6c4108 Include `plat_psci_common.c` from the new location by Soby Mathew · 9 years ago
  91. e82e29c Implement plat_get_syscnt_freq2 on platforms by Antonio Nino Diaz · 8 years ago
  92. 3c0087a Move `plat_get_syscnt_freq()` to arm_common.c by Yatharth Kochar · 9 years ago
  93. 2c7ed5b Dump platform-defined regs in crash reporting by Gerald Lejeune · 9 years ago
  94. cc037c1 Migrate platform ports to the new xlat_tables library by Soby Mathew · 9 years ago
  95. 6fb7880 Merge pull request #508 from soby-mathew/sm/debug_xlat by danh-arm · 9 years ago
  96. c9bac9c Use tf_printf() for debug logs from xlat_tables.c by Soby Mathew · 9 years ago
  97. e7ae6db Disable PL011 UART before configuring it by Juan Castillo · 9 years ago
  98. 33f5c41 Include psci.h from tegra platform header by Yatharth Kochar · 9 years ago
  99. a78bb1b Tegra: remove support for legacy platform APIs by Varun Wadekar · 9 years ago
  100. b2baa89 Tegra: flowctrl: rename tegra_fc_cpu_idle() to tegra_fc_cpu_powerdn() by Varun Wadekar · 9 years ago