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filogic
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atf
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b2baa8924fc334cec7304e10a21dc36c72e87edb
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plat
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nvidia
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tegra
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soc
8b82fae
Tegra: introduce per-soc system reset handler
by Varun Wadekar
· 9 years ago
4e9c231
Tegra210: wait for 512 timer ticks before retention entry
by Varun Wadekar
· 9 years ago
e98a146
Tegra132: set TZDRAM_BASE to 0xF5C00000
by Varun Wadekar
· 9 years ago
bc78744
Tegra210: enable WRAP to INCR burst type conversions
by Varun Wadekar
· 9 years ago
0f3baa0
Tegra: Support for Tegra's T132 platforms
by Varun Wadekar
· 9 years ago
254441d
Tegra: implement per-SoC validate_power_state() handler
by Varun Wadekar
· 9 years ago
5f4e643
Tegra: T210: include CPU files from SoC's platform.mk
by Varun Wadekar
· 9 years ago
d1b6150
Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs
by Varun Wadekar
· 9 years ago
6cab707
Tegra210: lock PMC registers holding CPU vector addresses
by Varun Wadekar
· 9 years ago
071b787
Tegra210: deassert CPU reset signals during power on
by Varun Wadekar
· 9 years ago
81b1383
Implement get_sys_suspend_power_state() handler for Tegra
by Varun Wadekar
· 9 years ago
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· 9 years ago