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git01.mediatek.com / filogic / atf / b1e957e198819098db84b42e9a87e35ea333aa20 / include / lib / aarch64 / arch.h
  1. b1e957e GIC: Add API to get running priority by Jeenu Viswambharan · 7 years ago
  2. 502ca97 Merge pull request #1105 from antonio-nino-diaz-arm/an/epd1-bit by davidcunado-arm · 7 years ago
  3. f94e40d Fix type of `unsigned long` constants by Antonio Nino Diaz · 7 years ago
  4. c8274a8 Set TCR_EL1.EPD1 bit to 1 by Antonio Nino Diaz · 7 years ago
  5. 02c6307 Helper macro to create MAIR encodings by Isla Mitchell · 7 years ago
  6. c4a1a07 Enable CnP bit for ARMv8.2 CPUs by Isla Mitchell · 7 years ago
  7. ee3457b aarch64: Enable Statistical Profiling Extensions for lower ELs by dp-arm · 7 years ago
  8. fee8653 Fully initialise essential control registers by David Cunado · 8 years ago
  9. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
  10. 6715485 Merge pull request #927 from jeenu-arm/state-switch by davidcunado-arm · 7 years ago
  11. bc1a929 Introduce ARM SiP service to switch execution state by Jeenu Viswambharan · 8 years ago
  12. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  13. 2a9b882 Add macro to check whether the CPU implements an EL by Jeenu Viswambharan · 8 years ago
  14. 7d99b6c Merge branch 'integration' into tf_issue_461 by Scott Branden · 8 years ago
  15. bf404c0 Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · 8 years ago
  16. ede39cb Changes to support execution in AArch32 state for JUNO by Yatharth Kochar · 8 years ago
  17. b4a7294 Tegra: Add support for fake system suspend by Vignesh Radhakrishnan · 8 years ago
  18. d4acf20 Merge pull request #879 from Summer-ARM/sq/mt-support by davidcunado-arm · 8 years ago
  19. 93c812f ARM platforms: Add support for MT bit in MPIDR by Summer Qin · 8 years ago
  20. ac99803 Add dynamic region support to xlat tables lib v2 by Antonio Nino Diaz · 8 years ago
  21. 595d0d5 Disable secure self-hosted debug via MDCR_EL3/SDCR by dp-arm · 8 years ago
  22. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  23. d1beee2 Add PLAT_xxx_ADDR_SPACE_SIZE definitions by Antonio Nino Diaz · 8 years ago
  24. 5f55e28 Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR by David Cunado · 8 years ago
  25. a993c42 Unify SCTLR initialization for AArch32 normal world by Soby Mathew · 8 years ago
  26. d48ae61 Automatically select initial xlation lookup level by Antonio Nino Diaz · 8 years ago
  27. c53ac5e Move SIZE_FROM_LOG2_WORDS macro to utils.h by Soby Mathew · 8 years ago
  28. 44170c4 Refactor the xlat_tables library code by Soby Mathew · 9 years ago
  29. 851dc7e Add ISR_EL1 to crash report by Gerald Lejeune · 9 years ago
  30. 52b1ba6 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · 9 years ago
  31. 92712a5 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · 9 years ago
  32. 94efd1f Add missing RES1 bit in SCTLR_EL1 by Vikram Kanigiri · 9 years ago
  33. 0cdebbd Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · 10 years ago
  34. 4e97e54 Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · 10 years ago
  35. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 10 years ago
  36. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  37. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  38. 798140d Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  39. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  40. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  41. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  42. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  43. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  44. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · 10 years ago
  45. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  46. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  47. ed6ff95 Split platform.h into separate headers by Dan Handley · 10 years ago
  48. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · 10 years ago
  49. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  50. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · 10 years ago
  51. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · 11 years ago
  52. bcd60ba Separate BL functions out of arch.h by Dan Handley · 11 years ago
  53. a70615f Move include and source files to logical locations by Dan Handley · 11 years ago[Renamed from include/aarch64/arch.h]
  54. 992dc07 Merge pull request #50 from vikramkanigiri/vk/tf-issues#26 by achingupta · 11 years ago