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git01.mediatek.com / filogic / atf / b10ef1c11127b3a827ca4d79e482fff06ae62ee6 / plat / nxp / common / include / default
  1. 7e20b7a feat(layerscape): add soc helper macro definition for chassis 3 by Jiafei Pan · 2 years, 9 months ago
  2. 21a3284 feat(layerscape): define more chassis 3 hardware address by Jiafei Pan · 2 years, 9 months ago
  3. d81dc46 feat(nxp/common/io): add ifc nor and nand as io devices by Jiafei Pan · 3 years, 1 month ago
  4. be9efe5 feat(nxp/common/rcpm): add RCPM2 registers definition by Jiafei Pan · 3 years, 1 month ago
  5. 64e2ba7 feat(plat/nxp/common): add EESR register definition by Jiafei Pan · 3 years, 1 month ago
  6. 0a7cf57 feat(plat/nxp/common): define default SD buffer by Jiafei Pan · 3 years, 2 months ago
  7. 40b6d86 feat(plat/nxp/common): add SecMon register definition for ch_3_2 by Jiafei Pan · 3 years, 2 months ago
  8. f4a5605 feat(plat/nxp/common): add CCI and EPU address definition by Jiafei Pan · 3 years, 2 months ago
  9. 82bd843 nxp: deflt hdr files for soc & their platforms by Pankaj Gupta · 4 years ago