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git01.mediatek.com / filogic / atf / afa1efa001d726ad74ef560c7a31076e35aa8a6f / plat / nvidia / tegra / common
  1. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · Thu Oct 29 10:37:28 2015 +0530
  2. 6bb6246 Tegra: add tzdram_base to plat_params_from_bl2 struct by Varun Wadekar · Tue Oct 06 12:49:31 2015 +0530
  3. 7a9a285 Tegra: Memory Controller Driver (v1) by Varun Wadekar · Fri Sep 18 11:21:22 2015 +0530
  4. baf903e Tegra: sanity check members of the "from_bl2" struct by Varun Wadekar · Tue Sep 22 15:00:06 2015 +0530
  5. 39f87d1 Tegra: use ClusterId for calculating core position by Varun Wadekar · Tue Sep 22 13:45:07 2015 +0530
  6. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · Tue Sep 22 13:33:56 2015 +0530
  7. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · Thu Sep 03 14:32:44 2015 +0530
  8. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · Tue Aug 25 17:01:06 2015 +0530
  9. a8954fc Replace some memset call by zeromem by Douglas Raillard · Thu Jan 26 15:54:44 2017 +0000
  10. 21362a9 Introduce unified API to zero memory by Douglas Raillard · Fri Dec 02 13:51:54 2016 +0000
  11. 0fac5af Move BL_COHERENT_RAM_BASE/END defines to common_def.h by Masahiro Yamada · Wed Dec 28 16:11:41 2016 +0900
  12. 1723113 Migrate platform makefile to new console driver location by Soby Mathew · Mon Aug 08 12:33:06 2016 +0100
  13. f6c4108 Include `plat_psci_common.c` from the new location by Soby Mathew · Tue May 03 12:31:18 2016 +0100
  14. cc037c1 Migrate platform ports to the new xlat_tables library by Soby Mathew · Fri Apr 08 16:42:58 2016 +0100
  15. e7ae6db Disable PL011 UART before configuring it by Juan Castillo · Thu Nov 26 14:52:15 2015 +0000
  16. a78bb1b Tegra: remove support for legacy platform APIs by Varun Wadekar · Fri Aug 07 10:03:00 2015 +0530
  17. b2baa89 Tegra: flowctrl: rename tegra_fc_cpu_idle() to tegra_fc_cpu_powerdn() by Varun Wadekar · Thu Aug 27 10:25:29 2015 +0530
  18. 8b82fae Tegra: introduce per-soc system reset handler by Varun Wadekar · Mon Nov 09 17:39:28 2015 -0800
  19. 4489ad1 Tegra: Perform cache maintenance on video carveout memory by Vikram Kanigiri · Thu Sep 10 14:12:36 2015 +0100
  20. 1be2f97 Tegra: fix logic to clear videomem regions by Varun Wadekar · Wed Aug 26 15:06:14 2015 +0530
  21. 4e9c231 Tegra210: wait for 512 timer ticks before retention entry by Varun Wadekar · Fri Aug 21 15:56:02 2015 +0530
  22. e1eaf8e Tegra: memmap the actual memory available for BL31 by Varun Wadekar · Tue Aug 11 14:20:14 2015 +0530
  23. c8bfe2e Tegra: retrieve BL32's bootargs from bl32_ep_info by Varun Wadekar · Fri Jul 31 10:03:01 2015 +0530
  24. 0f3baa0 Tegra: Support for Tegra's T132 platforms by Varun Wadekar · Thu Jul 16 11:36:33 2015 +0530
  25. 254441d Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · Thu Jul 23 10:07:54 2015 +0530
  26. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · Tue Jul 21 11:53:35 2015 +0530
  27. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · Thu Jul 16 09:46:28 2015 +0530
  28. 30d8977 Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · Thu Jul 16 10:38:11 2015 +0530
  29. fccf8e0 Tegra: PMC: check if a CPU is already online by Varun Wadekar · Thu Jul 16 10:35:12 2015 +0530
  30. 85a90cf Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · Wed Jul 08 13:46:42 2015 +0530
  31. bc74fec Tegra: introduce delay timer support by Varun Wadekar · Thu Jul 16 15:47:03 2015 +0530
  32. 207cc73 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · Wed Jul 08 12:57:50 2015 +0530
  33. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · Fri Jul 03 16:31:28 2015 +0530
  34. d3a4150 Add missing features to the Tegra GIC driver by Varun Wadekar · Tue Jun 16 11:23:00 2015 +0530
  35. f9aae8b Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · Thu Jun 18 14:58:33 2015 +0100
  36. 7a269e2 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · Wed Jun 10 14:04:32 2015 +0530
  37. 52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · Fri Jun 05 12:57:27 2015 +0530
  38. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · Tue May 19 16:48:04 2015 +0530