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filogic
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atf
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acdf41107ed2ec8cd9c485fd4bb74809850de009
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lib
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cpus
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9b38fc8
Initialise cpu ops after enabling data cache
by Vikram Kanigiri
· 10 years ago
b5a6304
Fix the Cortex-A57 reset handler register usage
by Soby Mathew
· 10 years ago
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· 10 years ago
7d861ea
Invalidate the dcache after initializing cpu-ops
by Soby Mathew
· 10 years ago
937488b
Optimize Cortex-A57 cluster power down sequence on Juno
by Soby Mathew
· 10 years ago
1604fa0
Optimize barrier usage during Cortex-A57 power down
by Soby Mathew
· 10 years ago
c088433
Apply errata workarounds only when major/minor revisions match.
by Soby Mathew
· 10 years ago
42aa5eb
Add support for level specific cache maintenance operations
by Soby Mathew
· 10 years ago
802f865
Add support for selected Cortex-A57 errata workarounds
by Soby Mathew
· 10 years ago
38b4bc9
Add CPU specific crash reporting handlers
by Soby Mathew
· 10 years ago
8e2f287
Add CPU specific power management operations
by Soby Mathew
· 10 years ago
f1785fd
Add platform API for reset handling
by Soby Mathew
· 10 years ago
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· 10 years ago