Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
aa26f53292154ea9500b489d1585c7a746c75416
/
plat
/
nvidia
/
tegra
/
common
/
aarch64
91b11c3
Tegra: Rename CORTEX_A57_ACTLR_EL1 to *CPUACTLR*
by Eleanor Bonnici
· 7 years ago
b4c75e9
Add new alignment parameter to func assembler macro
by Julius Werner
· 7 years ago
e363146
Fix order of remaining platform #includes
by Isla Mitchell
· 7 years ago
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· 7 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 7 years ago
4e6ae18
Tegra: no need to re-init the same console
by Varun Wadekar
· 7 years ago
2bb9f47
Tegra: replace ASM signed tests with unsigned
by Douglas Raillard
· 7 years ago
69ce101
Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
by Varun Wadekar
· 8 years ago
25e658e
Tegra: include platform_def.h to access UART macros
by Varun Wadekar
· 8 years ago
1ec441e
Tegra: relocate code to BL31_BASE during cold boot
by Varun Wadekar
· 8 years ago
d2014c6
Tegra: init normal/crash console for platforms
by Varun Wadekar
· 9 years ago
39f87d1
Tegra: use ClusterId for calculating core position
by Varun Wadekar
· 9 years ago
b24dea9
Tegra: enable processor retention and L2/CPUECTLR access
by Varun Wadekar
· 9 years ago
e7ae6db
Disable PL011 UART before configuring it
by Juan Castillo
· 9 years ago
a78bb1b
Tegra: remove support for legacy platform APIs
by Varun Wadekar
· 9 years ago
4e9c231
Tegra210: wait for 512 timer ticks before retention entry
by Varun Wadekar
· 9 years ago
d1b6150
Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs
by Varun Wadekar
· 9 years ago
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· 9 years ago