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git01.mediatek.com / filogic / atf / a7d21c7d566ff82b554e2bdcec9913d093b8d265 / include / drivers / st / stm32mp_clkfunc.h
  1. 3c0fbfe feat(st): update the security based on new compatible by Lionel Debieve · Tue Dec 15 10:35:59 2020 +0100
  2. deef969 refactor(st-clock): update STGEN management by Lionel Debieve · Wed Dec 04 21:50:19 2019 +0100
  3. 5177ea2 refactor(st-clock): directly use oscillator name by Gabriel Fernandez · Fri May 15 08:00:03 2020 +0200
  4. dc08ebe feat(drivers/st/uart): add uart driver for STM32MP1 by Nicolas Le Bayon · Wed Sep 11 11:46:40 2019 +0200
  5. 286d81e refactor(drivers/st/clk): change fdt_get_rcc_node as static by Patrick Delaunay · Tue Oct 06 14:32:26 2020 +0200
  6. a18f61b stm32mp1: get peripheral base address from a define by Yann Gautier · Tue May 05 17:58:40 2020 +0200
  7. cc99f3f plat/stm32: Use generic fdt_read_uint32_array() implementation by Andre Przywara · Thu Mar 26 12:51:21 2020 +0000
  8. 5f2e874 clk: stm32mp1: move oscillator functions to generic file by Yann Gautier · Fri May 17 15:57:56 2019 +0200
  9. 4d42947 stm32mp1: split clkfunc code by Yann Gautier · Thu Feb 14 11:15:20 2019 +0100