1. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 9 years ago
  2. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 9 years ago
  3. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 9 years ago
  4. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 9 years ago
  5. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 9 years ago
  6. b2b79e8 Merge pull request #595 from sandrine-bailleux-arm/sb/unoptimised-build by danh-arm · 9 years ago
  7. 37a12df Fix build error with optimizations disabled (-O0) by Sandrine Bailleux · 9 years ago
  8. 44170c4 Refactor the xlat_tables library code by Soby Mathew · 9 years ago
  9. 55f9f4b Merge pull request #577 from antonio-nino-diaz-arm/an/remove-xlat-helpers by danh-arm · 9 years ago
  10. 346f1f9 Remove xlat_helpers.c by Antonio Nino Diaz · 9 years ago
  11. 851dc7e Add ISR_EL1 to crash report by Gerald Lejeune · 9 years ago
  12. 6af70f5 Remove DAIF bits handling macros by Gerald Lejeune · 9 years ago
  13. 52b1ba6 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · 9 years ago
  14. 6c2d663 Merge pull request #523 from jcastillo-arm/jc/genfw-791 by danh-arm · 9 years ago
  15. 2e86cb1 ARM platforms: rationalise memory attributes of shared memory by Juan Castillo · 9 years ago
  16. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 9 years ago
  17. 46dd170 Remove direct usage of __attribute__((foo)) by Soren Brinkmann · 9 years ago
  18. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 9 years ago
  19. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  20. 8b0eafe Initialize VTTBR_EL2 when bypassing EL2 by Sandrine Bailleux · 9 years ago
  21. 92712a5 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · 9 years ago
  22. c66bb64 Merge pull request #435 from sandrine-bailleux/sb/juno-r2 by Achin Gupta · 9 years ago
  23. 29a7a03 Juno R2: Configure the correct L2 RAM latency values by Sandrine Bailleux · 9 years ago
  24. 94efd1f Add missing RES1 bit in SCTLR_EL1 by Vikram Kanigiri · 9 years ago
  25. 9fbf5e4 Make CASSERT() macro callable from anywhere by Sandrine Bailleux · 9 years ago
  26. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · 9 years ago
  27. e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · 9 years ago
  28. 3ce4e88 Add macros for retention control in Cortex-A53/A57 by Varun Wadekar · 9 years ago
  29. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · 9 years ago
  30. a310c4f Add mmio utility functions by developer · 9 years ago
  31. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · 9 years ago
  32. ea59668 Add header guards to asm macro files by Dan Handley · 10 years ago
  33. 0cdebbd Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · 10 years ago
  34. 05cbb00 Merge pull request #277 from soby-mathew/sm/coh_lock_opt by danh-arm · 10 years ago
  35. 2eb68ca Merge pull request #280 from vwadekar/tlkd-fixed-v3 by danh-arm · 10 years ago
  36. 97625e3 Translate secure/non-secure virtual addresses by Varun Wadekar · 10 years ago
  37. 156280c Remove the `owner` field in bakery_lock_t data structure by Soby Mathew · 10 years ago
  38. a0a897d Optimize the bakery lock structure for coherent memory by Soby Mathew · 10 years ago
  39. 632432b Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · 10 years ago
  40. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 10 years ago
  41. 4e97e54 Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · 10 years ago
  42. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  43. 26fb90e Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · 10 years ago
  44. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · 10 years ago
  45. ed99566 Add macros for domain specific barriers. by Soby Mathew · 10 years ago
  46. 30c231b Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · 10 years ago
  47. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 10 years ago
  48. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  49. 070a3e0 Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 10 years ago
  50. b08bc04 Create BL stage specific translation tables by Soby Mathew · 10 years ago
  51. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  52. feddfcf Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 10 years ago
  53. 798140d Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  54. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  55. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  56. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  57. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  58. 7b83c44 Move IO storage source to drivers directory by Dan Handley · 10 years ago
  59. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  60. e998254 Make enablement of the MMU more flexible by Achin Gupta · 10 years ago
  61. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · 10 years ago
  62. 22129f5 Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · 10 years ago
  63. 3c74a44 Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · 10 years ago
  64. 42970b0 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · 10 years ago
  65. af9dd82 Inline the mmio accessor functions by Andrew Thoelke · 10 years ago
  66. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  67. 958cc02 Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · 10 years ago
  68. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  69. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 10 years ago
  70. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  71. 1359236 Enable mapping higher physical address by Lin Ma · 10 years ago
  72. b226a4d Add enable mmu platform porting interfaces by Dan Handley · 10 years ago
  73. ed6ff95 Split platform.h into separate headers by Dan Handley · 10 years ago
  74. a17fefa Remove extern keyword from function declarations by Dan Handley · 10 years ago
  75. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · 10 years ago
  76. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  77. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · 10 years ago
  78. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago
  79. 25232af Introduce IS_IN_ELX() macros by Sandrine Bailleux · 10 years ago
  80. 5879ffd Remove unused or invalid asm helper functions by Andrew Thoelke · 11 years ago
  81. 438c63a Replace disable_mmu with assembler version by Andrew Thoelke · 11 years ago
  82. a4cb68e Remove variables from .data section by Dan Handley · 11 years ago
  83. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · 11 years ago
  84. e2712bc Always use named structs in header files by Dan Handley · 11 years ago
  85. bcd60ba Separate BL functions out of arch.h by Dan Handley · 11 years ago
  86. f3c8f32 Separate out CASSERT macro into own header by Dan Handley · 11 years ago
  87. a70615f Move include and source files to logical locations by Dan Handley · 11 years ago