1. 3f00a89 GICv3: Allow either G1S or G0 interrupts to be configured by Yatharth Kochar · Tue Sep 06 11:48:05 2016 +0100
  2. 14ce777 Merge pull request #678 from soby-mathew/sm/PSCI_AArch32 by danh-arm · Thu Aug 18 11:38:19 2016 +0100
  3. 869e3db gicv3: disable Group1 NonSecure interrupts during core powerdown by Sudeep Holla · Thu Aug 04 16:14:50 2016 +0100
  4. d645232 AArch32: Enable GIC and TZC support by Soby Mathew · Thu May 05 13:59:07 2016 +0100
  5. 50f6fe4 Move private APIs in gic_common.h to a private header by Soby Mathew · Mon Feb 01 17:59:22 2016 +0000
  6. 5c5c36b Rename GICv3 interrupt group macros by Soby Mathew · Thu Dec 03 14:12:54 2015 +0000
  7. 92712a5 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · Thu Sep 03 14:18:02 2015 +0100