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nvidia
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tegra
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soc
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1edb882
Tegra210: new TZDRAM base address
by Varun Wadekar
· 8 years ago
dba8007
Tegra210: set core power state during cluster power down
by Varun Wadekar
· 8 years ago
b7b4575
Tegra: GIC: enable FIQ interrupt handling
by Varun Wadekar
· 9 years ago
6eec6d6
Tegra: allow individual SoCs to restore their settings
by Varun Wadekar
· 9 years ago
d43583c
cpus: denver: disable DCO operations from platform code
by Varun Wadekar
· 9 years ago
6077dce
Tegra: enable PSCI extended state ID processing
by Varun Wadekar
· 9 years ago
923d04a
Tegra: handlers for common and SoC-specific SiP calls
by Varun Wadekar
· 9 years ago
d2014c6
Tegra: init normal/crash console for platforms
by Varun Wadekar
· 9 years ago
7a9a285
Tegra: Memory Controller Driver (v1)
by Varun Wadekar
· 9 years ago
b24dea9
Tegra: enable processor retention and L2/CPUECTLR access
by Varun Wadekar
· 9 years ago
97f2490
Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform
by Varun Wadekar
· 9 years ago
cbdace1
Tegra: SoC specific SiP handlers
by Varun Wadekar
· 9 years ago
a1176ba
Tegra: include flowctlr driver from SoC specific makefiles
by Varun Wadekar
· 9 years ago
e82e29c
Implement plat_get_syscnt_freq2 on platforms
by Antonio Nino Diaz
· 8 years ago
3c0087a
Move `plat_get_syscnt_freq()` to arm_common.c
by Yatharth Kochar
· 9 years ago
a78bb1b
Tegra: remove support for legacy platform APIs
by Varun Wadekar
· 9 years ago
8b82fae
Tegra: introduce per-soc system reset handler
by Varun Wadekar
· 9 years ago
4e9c231
Tegra210: wait for 512 timer ticks before retention entry
by Varun Wadekar
· 9 years ago
e98a146
Tegra132: set TZDRAM_BASE to 0xF5C00000
by Varun Wadekar
· 9 years ago
bc78744
Tegra210: enable WRAP to INCR burst type conversions
by Varun Wadekar
· 9 years ago
0f3baa0
Tegra: Support for Tegra's T132 platforms
by Varun Wadekar
· 9 years ago
254441d
Tegra: implement per-SoC validate_power_state() handler
by Varun Wadekar
· 9 years ago
5f4e643
Tegra: T210: include CPU files from SoC's platform.mk
by Varun Wadekar
· 9 years ago
d1b6150
Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs
by Varun Wadekar
· 9 years ago
6cab707
Tegra210: lock PMC registers holding CPU vector addresses
by Varun Wadekar
· 9 years ago
071b787
Tegra210: deassert CPU reset signals during power on
by Varun Wadekar
· 9 years ago
81b1383
Implement get_sys_suspend_power_state() handler for Tegra
by Varun Wadekar
· 9 years ago
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· 9 years ago