1. bb0aa39 cpulib: Add ISBs or comment why they are unneeded by Dimitris Papastamos · 6 years ago
  2. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  3. e6625ec Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  4. 570c06a Rename symbols and files relating to CVE-2017-5715 by Dimitris Papastamos · 6 years ago
  5. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 6 years ago
  6. 858bd61 Print erratum application report for CVE-2017-5715 by Dimitris Papastamos · 6 years ago
  7. 446f7f1 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  8. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 7 years ago
  9. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  10. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  11. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  12. 3f13c35 Apply workaround for errata 813419 of Cortex-A57 by Antonio Nino Diaz · 7 years ago
  13. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  14. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  15. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  16. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 8 years ago
  17. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 8 years ago
  18. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 8 years ago
  19. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 8 years ago
  20. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 8 years ago
  21. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · 8 years ago
  22. f12a31d Cortex-Axx: Unconditionally apply CPU reset operations by Sandrine Bailleux · 8 years ago
  23. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 9 years ago
  24. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 9 years ago
  25. b5a6304 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 9 years ago
  26. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  27. 937488b Optimize Cortex-A57 cluster power down sequence on Juno by Soby Mathew · 10 years ago
  28. 1604fa0 Optimize barrier usage during Cortex-A57 power down by Soby Mathew · 10 years ago
  29. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  30. 42aa5eb Add support for level specific cache maintenance operations by Soby Mathew · 10 years ago
  31. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  32. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  33. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  34. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago[Renamed (82%) from lib/aarch64/cpu_helpers.S]
  35. c61399b Merge pull request #191 from danh-arm/jc/tf-issues/218 by danh-arm · 10 years ago