1. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · Mon Jun 05 14:54:46 2017 -0700
  2. 66231d1 Tegra: enable 'signed-comparison' compilation warning/errors by Varun Wadekar · Wed Jun 07 09:57:42 2017 -0700
  3. 805c2c7 Add support for Cortex-A75 and Cortex-A55 CPUs by David Wang · Wed Nov 09 16:29:02 2016 +0000
  4. 815faa8 Use a callee-saved register to be AAPCS-compliant by dp-arm · Fri May 05 12:21:03 2017 +0100
  5. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  6. bf360df Merge pull request #910 from dp-arm/dp/AArch32-juno-port by davidcunado-arm · Fri Apr 21 17:10:27 2017 +0100
  7. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · Thu Nov 10 16:17:51 2016 +0000
  8. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · Thu Apr 20 09:58:28 2017 +0100
  9. 8cbdab2 Merge pull request #870 from douglas-raillard-arm/dr/remove_asm_signed_test by davidcunado-arm · Wed Mar 29 09:58:20 2017 +0100
  10. 00eefd9 Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · Thu Oct 06 16:54:53 2016 +0100
  11. 9d92e8c Replace ASM signed tests with unsigned by Douglas Raillard · Tue Mar 07 16:36:14 2017 +0000
  12. c4364f6 Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat by davidcunado-arm · Thu Mar 16 12:42:32 2017 +0000
  13. 3f13c35 Apply workaround for errata 813419 of Cortex-A57 by Antonio Nino Diaz · Fri Feb 24 11:39:22 2017 +0000
  14. 0a7e27c Merge pull request #853 from vwadekar/tegra-changes-from-downstream-v3 by davidcunado-arm · Thu Mar 02 15:27:33 2017 +0000
  15. 8f87cc3 cpus: denver: remove barrier from denver_enable_dco() by Varun Wadekar · Fri May 06 16:35:30 2016 -0700
  16. 1cc176b Merge pull request #848 from douglas-raillard-arm/dr/improve_errata_doc by danh-arm · Tue Feb 28 12:07:32 2017 +0000
  17. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · Mon Feb 22 11:09:41 2016 -0800
  18. c847f66 Clarify errata ERRATA_A53_836870 documentation by Douglas Raillard · Wed Feb 15 17:38:43 2017 +0000
  19. 3c337a6 cpus: Add support for all Denver variants by Varun Wadekar · Thu Sep 03 17:15:06 2015 +0530
  20. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · Tue Jan 03 11:01:51 2017 +0000
  21. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · Sun Dec 25 23:36:24 2016 +0900
  22. 1f5f812 Correct system include order by David Cunado · Tue Jan 17 14:40:15 2017 +0000
  23. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · Fri Nov 18 12:58:28 2016 +0000
  24. adb7027 AArch32: Fix the stack alignment issue by Soby Mathew · Tue Dec 06 12:10:51 2016 +0000
  25. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · Tue Jul 12 15:47:03 2016 +0100
  26. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · Tue Jun 28 16:58:26 2016 +0100
  27. 748be1d AArch32: Add support in TF libraries by Soby Mathew · Thu May 05 14:10:46 2016 +0100
  28. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · Fri Jul 01 12:52:41 2016 +0530
  29. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · Tue Feb 09 12:00:03 2016 +0000
  30. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · Thu Apr 21 11:10:52 2016 +0100
  31. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · Thu Apr 14 14:24:13 2016 +0100
  32. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · Thu Apr 14 14:18:07 2016 +0100
  33. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · Thu Apr 14 14:04:48 2016 +0100
  34. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · Thu Apr 14 13:32:31 2016 +0100
  35. afa8a78 Fix wording in cpu-ops.mk comments by Sandrine Bailleux · Thu Apr 14 12:59:42 2016 +0100
  36. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · Mon Mar 21 10:36:47 2016 +0000
  37. f12a31d Cortex-Axx: Unconditionally apply CPU reset operations by Sandrine Bailleux · Fri Jan 29 14:37:58 2016 +0000
  38. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · Wed Jan 13 14:57:38 2016 +0000
  39. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · Thu Jan 07 16:52:49 2016 +0000
  40. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · Wed Jul 29 20:55:31 2015 +0800
  41. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · Tue Jul 14 17:11:20 2015 +0530
  42. e364a8a Fix recursive crash prints on FVP AEM model by Soby Mathew · Mon Apr 13 16:57:12 2015 +0100
  43. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  44. 632432b Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · Thu Mar 19 19:33:06 2015 +0000
  45. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · Tue Feb 17 11:50:28 2015 +0000
  46. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · Thu Jan 29 18:27:38 2015 +0000
  47. b5a6304 Fix the Cortex-A57 reset handler register usage by Soby Mathew · Thu Jan 29 12:00:58 2015 +0000
  48. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · Thu Nov 20 18:09:41 2014 +0000
  49. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · Tue Nov 18 10:14:14 2014 +0000
  50. 937488b Optimize Cortex-A57 cluster power down sequence on Juno by Soby Mathew · Mon Sep 22 14:13:34 2014 +0100
  51. 1604fa0 Optimize barrier usage during Cortex-A57 power down by Soby Mathew · Mon Sep 22 12:15:26 2014 +0100
  52. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · Mon Sep 22 12:11:36 2014 +0100
  53. 42aa5eb Add support for level specific cache maintenance operations by Soby Mathew · Tue Sep 02 10:47:33 2014 +0100
  54. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · Thu Aug 14 16:19:29 2014 +0100
  55. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · Thu Aug 14 13:36:41 2014 +0100
  56. 8e2f287 Add CPU specific power management operations by Soby Mathew · Thu Aug 14 12:49:05 2014 +0100
  57. f1785fd Add platform API for reset handling by Soby Mathew · Thu Aug 14 12:22:32 2014 +0100
  58. c704cbc Introduce framework for CPU specific operations by Soby Mathew · Thu Aug 14 11:33:56 2014 +0100