Log - 9ee0d243c6b103db09fbd5ce79527d1f6fecbb06 - filogic/atf

9fdfae3 fconf: Move remaining arm platform to fconf by Louis Mayencourt · Wed Feb 12 09:26:09 2020 +0000
64c9645 plat/arm/sgi: move GIC related constants to board files by Vijayenthiran Subramaniam · Mon Feb 03 12:14:01 2020 +0530
03f58bf platform/arm/sgi: add multi-chip mode parameter in HW_CONFIG dts by Vijayenthiran Subramaniam · Wed Oct 30 12:52:25 2019 +0530
7b424ba drivers/mhu: derive doorbell base address by Aditya Angadi · Tue Dec 31 10:14:32 2019 +0530
8af1843 plat/arm/sgi: add chip_id and multi_chip_mode to platform variant info by Vijayenthiran Subramaniam · Tue Oct 22 15:46:14 2019 +0530
2b4ad8d plat/arm/sgi: move bl31_platform_setup to board file by Vijayenthiran Subramaniam · Mon Sep 23 19:32:32 2019 +0530
c8330e7 board/rde1edge: fix incorrect topology tree description by Vijayenthiran Subramaniam · Wed Jan 29 22:00:59 2020 +0530
bc48991 plat/arm/sgi: introduce number of chips macro by Vijayenthiran Subramaniam · Thu Dec 26 17:45:58 2019 +0530
06dba29 Adds option to read ROTPK from registers for FVP by Max Shvetsov · Fri Dec 06 11:50:12 2019 +0000
f5cb00f plat/arm/sgi: move topology information to board folder by Vijayenthiran Subramaniam · Fri Dec 27 19:27:57 2019 +0530
4287c0c Unify type of "cpu_idx" across PSCI module. by Deepika Bhavnani · Fri Dec 13 10:23:18 2019 -0600
8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · Tue Jul 09 14:02:43 2019 -0700
fa42c9e arm: Shorten the Firmware Update (FWU) process by Ambroise Vincent · Thu Jul 04 14:58:45 2019 +0100
69bebd8 n1sdp: add code for DDR ECC enablement and BL33 copy to DDR by Manoj Kumar · Fri Jun 21 17:07:13 2019 +0100
0d31688 plat/arm: mhu: make mhu driver generic by Masahisa Kojima · Thu Mar 07 11:23:42 2019 +0900
533b554 board/rde1edge: rename sgiclarkh to rde1edge by Chandni Cherukuri · Fri Feb 22 16:44:49 2019 +0530