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git01.mediatek.com / filogic / atf / 9e31b01633b83ce4a5698866c9369d5969f49bc7 / plat / arm / board / rdn1edge
  1. 64c9645 plat/arm/sgi: move GIC related constants to board files by Vijayenthiran Subramaniam · Mon Feb 03 12:14:01 2020 +0530
  2. 03f58bf platform/arm/sgi: add multi-chip mode parameter in HW_CONFIG dts by Vijayenthiran Subramaniam · Wed Oct 30 12:52:25 2019 +0530
  3. c4e68a4 board/rdn1edge: add support for dual-chip configuration by Vijayenthiran Subramaniam · Mon Oct 28 14:49:48 2019 +0530
  4. 7b424ba drivers/mhu: derive doorbell base address by Aditya Angadi · Tue Dec 31 10:14:32 2019 +0530
  5. 8af1843 plat/arm/sgi: add chip_id and multi_chip_mode to platform variant info by Vijayenthiran Subramaniam · Tue Oct 22 15:46:14 2019 +0530
  6. 2b4ad8d plat/arm/sgi: move bl31_platform_setup to board file by Vijayenthiran Subramaniam · Mon Sep 23 19:32:32 2019 +0530
  7. bc48991 plat/arm/sgi: introduce number of chips macro by Vijayenthiran Subramaniam · Thu Dec 26 17:45:58 2019 +0530
  8. 06dba29 Adds option to read ROTPK from registers for FVP by Max Shvetsov · Fri Dec 06 11:50:12 2019 +0000
  9. f5cb00f plat/arm/sgi: move topology information to board folder by Vijayenthiran Subramaniam · Fri Dec 27 19:27:57 2019 +0530
  10. 4287c0c Unify type of "cpu_idx" across PSCI module. by Deepika Bhavnani · Fri Dec 13 10:23:18 2019 -0600
  11. 8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · Tue Jul 09 14:02:43 2019 -0700
  12. fa42c9e arm: Shorten the Firmware Update (FWU) process by Ambroise Vincent · Thu Jul 04 14:58:45 2019 +0100
  13. 69bebd8 n1sdp: add code for DDR ECC enablement and BL33 copy to DDR by Manoj Kumar · Fri Jun 21 17:07:13 2019 +0100
  14. 0d31688 plat/arm: mhu: make mhu driver generic by Masahisa Kojima · Thu Mar 07 11:23:42 2019 +0900
  15. 15ec1e5 board/rdn1edge: rename sgiclarka to rdn1edge by Chandni Cherukuri · Fri Feb 22 13:41:03 2019 +0530