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git01.mediatek.com / filogic / atf / 9d826a1ea60fa78c96e7d2ac57bab75b4ebd4fc6 / plat / xilinx / versal_net / include / platform_def.h
  1. efefcd4 feat(versal-net): ddr address reservation in dtb at runtime by Amit Nagal · 1 year ago
  2. c5b04f5 fix(versal-net): fix BLXX memory limits for user defined values by Michal Simek · 1 year, 2 months ago
  3. 2a47faa style(xilinx): replace ARM by Arm in copyrights by Michal Simek · 1 year, 3 months ago
  4. a63b354 refactor(versal): move set wake src fn to common place by Jay Buddhabhatti · 1 year, 5 months ago
  5. 6a44ad0 refactor(xilinx): rename gic macros to make common by Jay Buddhabhatti · 1 year, 5 months ago
  6. 3980f19 fix(versal_net): fix irq for IPI0 by Trung Tran · 1 year, 4 months ago
  7. 9179436 feat(versal-net): add support for Xilinx Versal NET platform by Michal Simek · 1 year, 11 months ago