Log - 9d754f65ffe4d01e5c5f9a022d94f6cfb2e0b854 - filogic/atf

d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · Thu Jul 16 09:46:28 2015 +0530
6cab707 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · Thu Jul 16 11:58:19 2015 +0530
30d8977 Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · Thu Jul 16 10:38:11 2015 +0530
fccf8e0 Tegra: PMC: check if a CPU is already online by Varun Wadekar · Thu Jul 16 10:35:12 2015 +0530
071b787 Tegra210: deassert CPU reset signals during power on by Varun Wadekar · Wed Jul 08 17:42:02 2015 +0530
85a90cf Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · Wed Jul 08 13:46:42 2015 +0530
bc74fec Tegra: introduce delay timer support by Varun Wadekar · Thu Jul 16 15:47:03 2015 +0530
207cc73 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · Wed Jul 08 12:57:50 2015 +0530
81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · Fri Jul 03 16:31:28 2015 +0530
d3a4150 Add missing features to the Tegra GIC driver by Varun Wadekar · Tue Jun 16 11:23:00 2015 +0530
f9aae8b Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · Thu Jun 18 14:58:33 2015 +0100
7a269e2 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · Wed Jun 10 14:04:32 2015 +0530
52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · Fri Jun 05 12:57:27 2015 +0530
b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · Tue May 19 16:48:04 2015 +0530