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git01.mediatek.com / filogic / atf / 9ac73a4ce4be494e714918bb203bafea6788ac9d / plat / nvidia / tegra / soc / t210 / drivers / se
  1. 45ad08b Tegra210: SE: switch SE clock source to CLK_M by Leo He · 6 years ago
  2. 1dbd19c Tegra210: SE: add context save support by Harvey Hsieh · 7 years ago
  3. 5ac897f plat: nvidia: remove spurious UTF-8 characters at top of platform files by Olivier Deprez · 4 years, 10 months ago
  4. ffbf32a Makefile: remove extra include paths in INCLUDES by Ambroise Vincent · 6 years ago
  5. 69b0e4a Tegra210_B01: SC7: Select RNG mode based on ECID by Samuel Payne · 7 years ago
  6. 40d3a67 Tegra210B01: SE/SE2 and PKA1 context save (SW) by Marvin Hsu · 8 years ago
  7. 0e07e45 Tegra: fix defects flagged by MISRA Rule 10.3 by Anthony Zhou · 7 years ago
  8. 1e6bed4 Tegra210: se: enable entropy/SE clocks before system suspend by Samuel Payne · 7 years ago
  9. ae1e079 Tegra210: se: disable SMMU before suspending SE block by Samuel Payne · 7 years ago
  10. 25fdca2 Tegra210: SE: remove logic to enable atomic save/restore by Samuel Payne · 7 years ago
  11. 809c773 Tegra210B01: initialize DRBG on boot and resume by Sam Payne · 8 years ago
  12. 21eea97 Tegra210B01: SE1 and SE2/PKA1 context save (atomic) by Marvin Hsu · 8 years ago