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git01.mediatek.com / filogic / atf / 9abe23b35921aa1b0c9964f6704212458fb276ca / include / lib / el3_runtime / aarch64 / context.h
  1. 9abe23b refactor(cm): remove el1 context when SPMD_SPM_AT_SEL2=1 by Jayanth Dodderi Chidanand · Tue May 07 18:50:57 2024 +0100
  2. aeb82d6 chore(cm): reorganise sctlr_el1 and tcr_el1 ctx code by Jayanth Dodderi Chidanand · Tue Jul 30 17:04:23 2024 +0100
  3. 36d524f chore(simd): remove unused macros and utilities for FP by Madhukar Pappireddy · Thu Apr 25 23:05:26 2024 -0500
  4. 5c1b8d9 feat(simd): introduce simd context helper APIs by Madhukar Pappireddy · Mon Jun 17 15:26:00 2024 -0500
  5. 4d69bd6 refactor(cm): convert el1-ctx assembly offset entries to c structure by Jayanth Dodderi Chidanand · Thu Apr 11 11:09:12 2024 +0100
  6. 3a71df6 feat(cm): add explicit context entries for ERRATA_SPECULATIVE_AT by Jayanth Dodderi Chidanand · Wed Jun 05 11:13:05 2024 +0100
  7. 118b335 feat(cm): context switch MDCR_EL3 register by Jayanth Dodderi Chidanand · Tue Jun 18 15:22:54 2024 +0100
  8. c1b4148 refactor(cm): move mpam registers into el2 context by Jayanth Dodderi Chidanand · Tue May 28 17:44:10 2024 +0100
  9. 739e8c7 fix(cm): add more feature registers to EL1 context mgmt by Madhukar Pappireddy · Wed Apr 17 17:07:13 2024 -0500
  10. bf9cb5f fix(cm): add more system registers to EL1 context mgmt by Madhukar Pappireddy · Mon Mar 25 17:49:00 2024 -0500
  11. c1be66f refactor(mte): remove mte, mte_perm by Govindraj Raja · Thu Mar 07 14:42:20 2024 -0600
  12. fbbee6b refactor(cm): couple el2 registers with dependent feature flags by Jayanth Dodderi Chidanand · Wed Jan 24 20:05:07 2024 +0000
  13. 1facfb1 refactor(context-mgmt): move EL1 save/restore routines into C by Jayanth Dodderi Chidanand · Mon Jan 08 13:14:27 2024 +0000
  14. 24d3a4e refactor(mte): deprecate CTX_INCLUDE_MTE_REGS by Govindraj Raja · Thu Dec 21 13:57:49 2023 -0600
  15. 4d5a8c5 fix(context-mgmt): align the memory address of EL2 context registers by Jayanth Dodderi Chidanand · Tue Jan 09 11:28:21 2024 +0000
  16. 4851b49 build(mpam): add new build option CTX_INCLUDE_MPAM_REGS by Arvind Ram Prakash · Fri Oct 06 14:35:21 2023 -0500
  17. b5d9559 refactor(cm): move MPAM3_EL3 reg to per world context by Arvind Ram Prakash · Wed Nov 08 12:28:30 2023 -0600
  18. 56aa382 refactor(cm): reset the cptr_el3 before perworld context setup by Jayanth Dodderi Chidanand · Mon Dec 11 11:22:02 2023 +0000
  19. f90a73c fix(ras): remove RAS_FFH_SUPPORT and introduce FFH_SUPPORT by Manish Pandey · Tue Oct 10 15:42:19 2023 +0100
  20. 07952fb feat(el3-runtime): modify vector entry paths by Manish Pandey · Thu May 25 13:46:14 2023 +0100
  21. 4fc00d2 refactor(cm): move EL3 registers to global context by Elizabeth Ho · Tue Jul 18 14:10:25 2023 +0100
  22. ab28d4b fix(mpam): refine MPAM initialization and enablement process by Arvind Ram Prakash · Wed Oct 11 12:10:56 2023 -0500
  23. a698989 refactor(cm): move remaining EL2 save/restore into C by Boyan Karatotev · Mon May 15 15:09:16 2023 +0100
  24. 870627e refactor(cpufeat): enable FEAT_RAS for FEAT_STATE_CHECKED by Andre Przywara · Fri Jan 27 12:25:49 2023 +0000
  25. d419e22 refactor(ras): replace RAS_EXTENSION with FEAT_RAS by Manish Pandey · Mon Feb 13 12:39:17 2023 +0000
  26. 326f295 feat(gcs): support guarded control stack by Mark Brown · Tue Mar 14 21:33:04 2023 +0000
  27. 293a661 feat(pie/por): support permission indirection and overlay by Mark Brown · Tue Mar 14 20:48:43 2023 +0000
  28. edc449d refactor(cpufeat): enable FEAT_NV2 for FEAT_STATE_CHECKED by Andre Przywara · Fri Jan 27 14:09:20 2023 +0000
  29. 902c902 refactor(cpufeat): enable FEAT_CSV2_2 for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 17:30:43 2022 +0000
  30. c346418 refactor(cpufeat): enable FEAT_ECV for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 17:30:43 2022 +0000
  31. 98908b3 refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 16:42:09 2022 +0000
  32. 84b8653 refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 16:42:09 2022 +0000
  33. ef948dc fix(spe): drop SPE EL2 context switch code by Andre Przywara · Fri Feb 03 15:23:59 2023 +0000
  34. c37eee7 feat(tcr2): support FEAT_TCR2 by Mark Brown · Tue Mar 14 20:13:03 2023 +0000
  35. 183638f style: remove useless trailing semicolon and line continuations by Elyes Haouas · Mon Feb 13 10:05:41 2023 +0100
  36. 06ea44e refactor(trf): enable FEAT_TRF for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 17:30:43 2022 +0000
  37. 1d8795e refactor(context-mgmt): move FEAT_HCX save/restore into C by Andre Przywara · Tue Nov 15 11:45:19 2022 +0000
  38. 5d6d2ab refactor(context-mgmt): move FEAT_FGT save/restore code into C by Andre Przywara · Thu Nov 10 14:40:37 2022 +0000
  39. 5362beb refactor(context mgmt): refactor EL2 context save and restore functions by Zelalem Aweke · Mon Apr 04 17:42:48 2022 -0500
  40. bd17eae refactor(context mgmt): remove registers accessible only from secure state from EL2 context by Zelalem Aweke · Wed Nov 03 13:31:53 2021 -0500
  41. 72b69b8 refactor(el3-runtime): replace ARM_ARCH_AT_LEAST macro with FEAT flags by Jayanth Dodderi Chidanand · Wed Jan 26 17:14:43 2022 +0000
  42. 13ae0f4 fix(amu): fault handling on EL2 context switch by Jayanth Dodderi Chidanand · Thu Nov 25 14:59:30 2021 +0000
  43. b6301e6 feat(rme): add context management changes for FEAT_RME by Zelalem Aweke · Fri Jul 09 17:54:30 2021 -0500
  44. f91e59f feat(hcx): add build option to enable FEAT_HCX by johpow01 · Wed Aug 04 19:38:18 2021 -0500
  45. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · Mon Mar 22 11:59:37 2021 +0000
  46. cf784f7 Fix: Remove save/restore of EL2 timer registers by Max Shvetsov · Wed Mar 31 19:00:38 2021 +0100
  47. fba2572 Fix exception handlers in BL31: Use DSB to synchronize pending EA by Madhukar Pappireddy · Fri Jul 24 03:27:12 2020 -0500
  48. 2b0ee97 el3_runtime: Rearrange context offset of EL1 sys registers by Manish V Badarkhe · Tue Jul 28 07:22:30 2020 +0100
  49. 0c16abd Fix exception in save/restore of EL2 registers. by Max Shvetsov · Wed May 13 18:15:39 2020 +0100
  50. 1962891 context: TPIDR_EL2 register not saved/restored by Olivier Deprez · Fri Mar 20 14:22:05 2020 +0100
  51. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · Mon Feb 17 16:15:47 2020 +0000
  52. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · Tue Feb 25 13:56:19 2020 +0000
  53. 91d8061 coverity: fix MISRA violations by Zelalem · Wed Feb 12 10:37:03 2020 -0600
  54. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  55. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · Thu Jul 18 14:25:33 2019 +0100
  56. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  57. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · Tue Jul 09 13:49:11 2019 -0700
  58. 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · Thu Jan 31 11:58:00 2019 +0000
  59. 13adfb1 Cleanup context handling library by Antonio Nino Diaz · Wed Jan 30 20:41:31 2019 +0000
  60. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  61. 864ca6f context_mgmt: Fix MISRA defects by Antonio Nino Diaz · Wed Oct 31 15:25:35 2018 +0000
  62. 32ceef5 SDEI: MISRA fixes by Jeenu Viswambharan · Thu Aug 02 10:14:12 2018 +0100
  63. bb1fd5b SDEI: Ensure SDEI handler executes with CVE-2018-3639 mitigation enabled by Dimitris Papastamos · Thu Jun 07 11:29:15 2018 +0100
  64. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · Wed May 16 11:36:14 2018 +0100
  65. 96c7df0 AArch64: Introduce External Abort handling by Jeenu Viswambharan · Thu Nov 30 12:54:15 2017 +0000
  66. b63c6f1 Optimize/cleanup BPIALL workaround by Dimitris Papastamos · Thu Jan 11 15:29:36 2018 +0000
  67. c52ebdc Workaround for CVE-2017-5715 on Cortex A73 and A75 by Dimitris Papastamos · Mon Dec 18 13:46:21 2017 +0000
  68. 5bdbb47 Refactor Statistical Profiling Extensions implementation by Dimitris Papastamos · Fri Oct 13 12:06:06 2017 +0100
  69. d1a1fd4 Move FPEXC32_EL2 to FP Context by David Cunado · Fri Oct 20 11:30:57 2017 +0100
  70. 4168f2f Init and save / restore of PMCR_EL0 / PMCR by David Cunado · Mon Oct 02 17:41:39 2017 +0100
  71. ee3457b aarch64: Enable Statistical Profiling Extensions for lower ELs by dp-arm · Tue May 23 09:32:49 2017 +0100
  72. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · Thu May 25 18:04:48 2017 -0700
  73. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  74. 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · Thu Mar 24 16:56:29 2016 +0000[Renamed from include/common/context.h]
  75. 24ab34f Fix coding guideline warnings by Soby Mathew · Tue May 03 17:11:42 2016 +0100
  76. d75d2ba Build option to include AArch32 registers in cpu context by Soby Mathew · Tue May 17 14:01:32 2016 +0100
  77. 6c0566c Move context management code to common location by Yatharth Kochar · Fri Oct 02 17:56:48 2015 +0100[Renamed from include/bl31/context.h]
  78. e58ddc0 Merge pull request #461 from yatharth-arm/yk/nvidia_patch by danh-arm · Wed Dec 09 16:15:23 2015 +0000