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git01.mediatek.com / filogic / atf / 93340e8cced4ec5916e353711cebd0840b7c9758 / plat / rockchip / rk3399 / drivers / soc
  1. 17d7d9b plat/rockchip: enable power domains of rk3399 before reset by Piotr Szczepanik · Tue Dec 10 20:55:00 2019 +0000
  2. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  3. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  4. f900a06 rockchip/rk3399: Add watchdog support in pmusram by Derek Basehore · Mon Apr 23 14:49:22 2018 -0700
  5. 127527f rockchip/rk3399: disable more powerdomain prepare for shutdown logic rail by Lin Huang · Mon May 22 10:29:59 2017 +0800
  6. 2c60b5f rockchip/rk3399: save and restore pd_alive register by Lin Huang · Thu May 18 18:04:25 2017 +0800
  7. 1f8fdeb rockchip/rk3399: set ddr clock source back to dpll when ddr resume by Lin Huang · Wed May 17 16:14:37 2017 +0800
  8. e363146 Fix order of remaining platform #includes by Isla Mitchell · Fri Jul 14 10:46:32 2017 +0100
  9. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  10. 22a9871 rockchip: rk3399: Clean up and seprate secure parts from SoC codes by Xing Zheng · Fri Feb 24 14:56:41 2017 +0800
  11. 5e1e48f rockchip: rk3399: configure the DDR secure region for BL31 image by Xing Zheng · Fri Feb 24 14:47:51 2017 +0800
  12. b4bcc1d rockchip: Clean up header and referenced files by Xing Zheng · Fri Feb 24 16:26:11 2017 +0800
  13. 93280b7 rk3399: dram: use PMU M0 to do ddr frequency scaling by Xing Zheng · Wed Oct 26 21:25:26 2016 +0800
  14. ff461d0 rockchip: rk3399: dram: remove dram_init and dts_timing_receive function by Derek Basehore · Thu Oct 20 20:46:43 2016 -0700
  15. 73dfd2e utils: move BIT(n) macro to utils.h by Masahiro Yamada · Mon Dec 05 14:28:59 2016 +0900
  16. 667e484 rockchip: remove no needed code for rk3399 by Caesar Wang · Tue Oct 25 17:14:40 2016 -0700
  17. 813a89a rockchip: disable watchdog during suspend by Caesar Wang · Fri Nov 04 21:13:01 2016 +0800
  18. 5339d18 rockchip: close the PD center logic during suspend by Caesar Wang · Thu Oct 27 01:13:34 2016 +0800
  19. f33eb2c rockchip: add support save/restore configuration for DDR during enter S3 by Caesar Wang · Thu Oct 27 01:13:16 2016 +0800
  20. a845690 rockchip: Break out common dram code for rk3399 by Caesar Wang · Thu Oct 27 01:12:34 2016 +0800
  21. c9ed717 Merge pull request #724 from rockchip-linux/support-rk3399-sdram by davidcunado-arm · Wed Oct 26 09:54:36 2016 +0100
  22. bb22862 rockchip: clear the power mode status via M0 by Caesar Wang · Wed Oct 12 01:47:51 2016 +0800
  23. a883702 rockchip: fixes the wrong CLKSEL_CON count for CRU by Caesar Wang · Thu Oct 20 14:14:45 2016 -0700
  24. 47e157c rockchip: fixes the clock select and divide register for rk3399 by Caesar Wang · Tue Sep 27 18:19:30 2016 -0700
  25. 9740bba rockchip: rk3399: add dram driver by Caesar Wang · Thu Aug 25 08:37:42 2016 +0800
  26. ed6b9a5 rockchip: update to handle PWMs for rk3399 by Caesar Wang · Thu Aug 11 02:11:45 2016 +0800
  27. ad39cfe rockchip: fixes typo and some bugs for suspend/resume tests by Caesar Wang · Thu Jul 21 10:36:22 2016 +0800
  28. 42e113e rockchip: support the suspend/resume for rk3399 by Tony Xie · Sat Jul 16 11:16:51 2016 +0800
  29. 038f6aa rockchip: support rk3399 gpio driver by Caesar Wang · Wed May 25 19:21:43 2016 +0800
  30. 59e41b5 rockchip: support the suspend/resume for rk3399 by Caesar Wang · Sun Apr 10 14:11:07 2016 +0800
  31. f6118cc Support for Rockchip's family SoCs by Tony Xie · Fri Jan 15 17:17:32 2016 +0800