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git01.mediatek.com / filogic / atf / 90e9900eabeeac7a82aae1f2777d6f0ab635cf02 / plat / renesas / rcar / platform.mk
  1. e3d1026 Revert "rcar_gen3: plat: Enable programmable CPU reset address" by Marek Vasut · 6 years ago
  2. 4bc543c rcar_gen3: drivers: pwrc: Switch to common delay implementation by Marek Vasut · 6 years ago
  3. 1778b41 rcar_gen3: drivers: delay: Rewrite from assembler to C by Marek Vasut · 6 years ago
  4. 38ec9e5 rcar_gen3: drivers: cpld: Move rcar_cpld_reset_cpu() into header by Marek Vasut · 6 years ago
  5. 83f4b84 rcar_gen3: plat: Enable programmable CPU reset address by Marek Vasut · 6 years ago
  6. 1bef575 rcar_gen3: plat: Disable SVE by Marek Vasut · 6 years ago
  7. 7043fce rcar_gen3: plat: Add missing dependency to rcar_srecord by Marek Vasut · 6 years ago
  8. 93c85fc plat: rcar: Pass DTB with DRAM layout from BL2 to next stages by Marek Vasut · 6 years ago
  9. 87c0405 rcar-gen3: control RPC hyper-flash access by Jorge Ramirez-Ortiz · 6 years ago
  10. 47503d2 rcar_gen3: drivers: staging by Jorge Ramirez-Ortiz · 6 years ago
  11. bf084dc rcar-gen3: initial commit for the rcar-gen3 boards by Jorge Ramirez-Ortiz · 6 years ago