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git01.mediatek.com / filogic / atf / 836c64fe5511ba85ab935902db356727b9b48631 / plat / st / stm32mp1 / stm32mp1_security.c
  1. a205a5c feat(st): use newly introduced clock framework by Yann Gautier · 3 years, 2 months ago
  2. 68e6d69 refactor(plat/st): use TZC400 bindings by Yann Gautier · 3 years, 4 months ago
  3. f3bd87e refactor(plat/st): map DDR secure at boot by Yann Gautier · 4 years, 2 months ago
  4. de00f3e refactor(plat/st): rework TZC400 configuration by Yann Gautier · 4 years, 2 months ago
  5. d782056 stm32mp1: add TZC400 interrupt management by Yann Gautier · 6 years ago
  6. cd40f32 stm32mp1: use stm32mp_get_ddr_ns_size() function by Yann Gautier · 4 years, 8 months ago
  7. b3386f7 stm32mp1: add OP-TEE support by Yann Gautier · 6 years ago
  8. e3de4c0 stm32mp1: fix TZC400 configuration against non-secure DDR by Yann Gautier · 6 years ago
  9. ed34232 stm32mp1: add minimal support for co-processor Cortex-M4 by Yann Gautier · 6 years ago
  10. e4a3c35 stm32mp1: update clock driver by Yann Gautier · 6 years ago
  11. b5d2ed4 stm32mp1: remove some dependencies on clocks and reset in drivers by Yann Gautier · 6 years ago
  12. a2e2a30 stm32mp1: make functions and macros more common by Yann Gautier · 6 years ago
  13. ee8f542 stm32mp1: split code between common and private parts by Yann Gautier · 6 years ago
  14. f9d40d5 stm32mp1: update platform files by Yann Gautier · 6 years ago
  15. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  16. 9d135e4 stm32mp1: Add BL32 SP_min secure monitor by Yann Gautier · 6 years ago
  17. caf575b stm32mp1: Add DDR support and its security with TZC400 by Yann Gautier · 6 years ago