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git01.mediatek.com / filogic / atf / 836c64fe5511ba85ab935902db356727b9b48631 / docs / plat / xilinx-versal.rst
  1. 82252a4 feat(plat/versal): add support for SLS mitigation by Venkatesh Yadav Abbarapu · 3 years, 4 months ago
  2. 17a12ce plat:xilinx:versal: Add JTAG DCC support by Venkatesh Yadav Abbarapu · 4 years ago
  3. 9156ffd xilinx: versal: PLM to ATF handover by Venkatesh Yadav Abbarapu · 4 years, 10 months ago
  4. cbc9005 plat: xilinx: versal: Make silicon default build target by Siva Durga Prasad Paladugu · 5 years ago
  5. f3653a6 doc: Reformat platform port documents by Paul Beesley · 5 years ago[Renamed (90%) from docs/plat/xilinx-versal.md]
  6. fe4af66 arm64: versal: Add support for new Xilinx Versal ACAPs by Siva Durga Prasad Paladugu · 6 years ago