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git01.mediatek.com / filogic / atf / 834728462301abf0d0569e1b745218ad10408750 / plat / rockchip / rk3399 / drivers / pmu / pmu.h
  1. 17d7d9b plat/rockchip: enable power domains of rk3399 before reset by Piotr Szczepanik · 5 years ago
  2. 65d5267 plat/rockchip: Switch to use new common BL aux parameter library by Julius Werner · 5 years ago
  3. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
  4. 4ab3a96 rockchip/rk3399: Change PD_CTR_LOOP to 10000 by Derek Basehore · 7 years ago
  5. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  6. b4bcc1d rockchip: Clean up header and referenced files by Xing Zheng · 8 years ago
  7. 5339d18 rockchip: close the PD center logic during suspend by Caesar Wang · 8 years ago
  8. 0620bb8 rockchip: move pmu registers into another header for rk3399 by Caesar Wang · 8 years ago
  9. 5045a1c rockchip: set gpio2 ~ gpio4 to input and pull none mode by Caesar Wang · 8 years ago
  10. 3e8548b rockchip: on rk3399 enable Schmitt trigger on 32 kHz clock by Caesar Wang · 8 years ago
  11. ed6b9a5 rockchip: update to handle PWMs for rk3399 by Caesar Wang · 8 years ago
  12. ad39cfe rockchip: fixes typo and some bugs for suspend/resume tests by Caesar Wang · 8 years ago
  13. 42e113e rockchip: support the suspend/resume for rk3399 by Tony Xie · 8 years ago
  14. d1b9d2d rockchip: support system off function for rk3399 by Caesar Wang · 8 years ago
  15. 59e41b5 rockchip: support the suspend/resume for rk3399 by Caesar Wang · 9 years ago
  16. f6118cc Support for Rockchip's family SoCs by Tony Xie · 9 years ago