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git01.mediatek.com / filogic / atf / 815f55035cc74e0a7c9830d94c52e70ed7dcd37a / tools / renesas / rcar_layout_create
  1. 255a409 build: use GCC to link by default by Chris Kay · Wed Feb 21 12:52:46 2024 +0000
  2. 523e864 build: use new toolchain variables for tools by Chris Kay · Mon Dec 04 12:03:51 2023 +0000
  3. c8a47ba build: refactor toolchain detection by Chris Kay · Fri Oct 20 09:17:33 2023 +0000
  4. 46d3ab3 fix(rcar): fix implicit rule invocations in tools by Chris Kay · Mon Jan 15 16:16:07 2024 +0000
  5. cb9efd8 fix(rcar3): fix load address range check by Takuya Sakata · Wed Dec 01 13:42:54 2021 +0900
  6. 1885aa5 feat(plat/rcar3): change the memory map for OP-TEE by Toshiyuki Ogasahara · Mon Jul 12 18:43:26 2021 +0900
  7. 4ae342c rcar_gen3: plat: Add initial D3 support by Marek Vasut · Sat Jan 05 13:56:03 2019 +0100
  8. bf084dc rcar-gen3: initial commit for the rcar-gen3 boards by Jorge Ramirez-Ortiz · Sun Sep 23 09:36:13 2018 +0200