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git01.mediatek.com / filogic / atf / 80d836dcf0290eced8389f959c383fb9a0a8f713 / include / arch / aarch64 / el3_common_macros.S
  1. 31a14e1 bl31: Split into two separate memory regions by Samuel Holland · 6 years ago
  2. c825768 PIE: make call to GDT relocation fixup generalized by Manish Pandey · 5 years ago
  3. add24a4 Explicitly disable the SPME bit in MDCR_EL3 by Petre-Ionut Tudor · 5 years ago
  4. d2f21b8 Add missing support for BL2_AT_EL3 in XIP memory by Lionel Debieve · 5 years ago
  5. 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · 5 years ago
  6. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
  7. 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · 6 years ago
  8. 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · 6 years ago
  9. 8d1ade6 Reorganize architecture-dependent header files by Antonio Nino Diaz · 6 years ago[Renamed from include/common/aarch64/el3_common_macros.S]
  10. 0f3a004 Merge pull request #1731 from miyatsu/doc-fix-20181225 by Antonio Niño Díaz · 6 years ago