1. 5a40256 Tegra186: reset CPU power state info while onlining by Varun Wadekar · Fri Apr 29 11:25:46 2016 -0700
  2. 66ff012 Tegra186: fix recursion in included headers (tegra_def.h/platform_def.h) by Varun Wadekar · Tue Apr 26 11:34:54 2016 -0700
  3. d2da47a Tegra186: reset power state info during CPU_ON by Varun Wadekar · Sat Apr 09 00:40:45 2016 -0700
  4. e2bc7f2 Tegra186: enable support for simulation environment by Varun Wadekar · Sat Apr 02 15:41:20 2016 -0700
  5. 47ddd00 Tegra186: check MCE firmware version during boot by Varun Wadekar · Mon Mar 28 16:00:02 2016 -0700
  6. a9002bb Tegra186: fix programming sequence for SC7/SC8 entry by Varun Wadekar · Mon Mar 28 15:11:43 2016 -0700
  7. 698e7c6 Tegra186: program default core wake mask during CPU_SUSPEND by Varun Wadekar · Mon Mar 28 15:05:03 2016 -0700
  8. 920fce8 Tegra186: clear the system cstate for offline core by Varun Wadekar · Mon Mar 28 14:43:03 2016 -0700
  9. ad2824f Tegra186: mce: enable LATIC for chip verification by Varun Wadekar · Mon Mar 28 13:44:35 2016 -0700
  10. 93bed2a Tegra186: save/restore BL31 context to/from TZDRAM by Varun Wadekar · Fri Mar 18 13:07:33 2016 -0700
  11. a0f2697 Tegra186: re-configure MSS' client settings by Varun Wadekar · Fri Mar 11 17:18:51 2016 -0800
  12. b877615 Tegra186: implement support for System Suspend by Varun Wadekar · Thu Mar 03 13:52:52 2016 -0800
  13. 3c95993 Tegra186: smmu: driver for the smmu hardware block by Varun Wadekar · Thu Mar 03 13:09:08 2016 -0800
  14. d66ee54 Tegra186: implement quasi power off (SC8) state by Varun Wadekar · Mon Feb 29 10:24:30 2016 -0800
  15. e26a55a Tegra186: disable DCO operations for PSCI_CPU_OFF by Varun Wadekar · Fri Feb 26 11:09:21 2016 -0800
  16. cad7b08 Tegra186: register FIQ interrupt sources by Varun Wadekar · Mon Dec 28 18:12:59 2015 -0800
  17. e60f1bf Tegra: memctrl_v2: check GPU state before VPR programming by Varun Wadekar · Wed Feb 17 10:10:50 2016 -0800
  18. 8964509 Tegra186: fix per-cpu wake times for CPU power states by Varun Wadekar · Tue Feb 09 14:55:44 2016 -0800
  19. a7c1ea7 Tegra186: add Video memory carveout settings by Varun Wadekar · Wed Feb 03 09:51:25 2016 -0800
  20. 4223657 Tegra186: support for C6/C7 CPU_SUSPEND states by Varun Wadekar · Mon Jan 18 19:03:19 2016 -0800
  21. c2c3a2a Tegra186: support for the latest platform port handlers by Varun Wadekar · Fri Jan 08 17:38:51 2016 -0800
  22. 38020c9 Tegra186: implement prepare_system_reset handler by Varun Wadekar · Thu Jan 07 14:36:12 2016 -0800
  23. a64806a Tegra186: implement CPU_OFF handler by Varun Wadekar · Tue Jan 05 15:17:41 2016 -0800
  24. 20c9429 Tegra186: update SYSCNT_FREQ to 31.25MHz by Varun Wadekar · Mon Jan 04 10:57:45 2016 -0800
  25. 94d8532 Tegra186: relocate bl31.bin to the SYSRAM by Varun Wadekar · Mon Nov 30 12:05:04 2015 -0800
  26. 782c83d Tegra186: implement prepare_system_off handler by Varun Wadekar · Tue Mar 14 14:25:35 2017 -0700
  27. abd153c Tegra186: power on/off secondary CPUs by Varun Wadekar · Mon Sep 14 09:31:39 2015 +0530
  28. 59c3aa0 Tegra186: SiP calls to interact with the MCE driver by Varun Wadekar · Wed Sep 09 11:33:08 2015 +0530
  29. a0352ab Tegra186: mce: driver for the CPU complex power manager block by Varun Wadekar · Tue Mar 14 14:24:35 2017 -0700
  30. 921b906 Tegra186: platform support for Tegra "T186" SoC by Varun Wadekar · Tue Aug 25 17:03:14 2015 +0530
  31. 1108fc6 plat/tegra: Enable Cortex-A53 erratum 855873 workaround by Andre Przywara · Mon Nov 07 10:53:14 2016 +0000
  32. ed3c62b Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUs by Varun Wadekar · Mon Mar 06 09:15:15 2017 -0800
  33. 20e9fef Tegra210: assert if afflvl0/1 have incorrect state-ids by Harvey Hsieh · Wed Dec 28 21:53:18 2016 +0800
  34. 1edb882 Tegra210: new TZDRAM base address by Varun Wadekar · Thu Sep 01 14:59:32 2016 -0700
  35. dba8007 Tegra210: set core power state during cluster power down by Varun Wadekar · Thu Sep 01 14:56:17 2016 -0700
  36. b7b4575 Tegra: GIC: enable FIQ interrupt handling by Varun Wadekar · Mon Dec 28 14:55:41 2015 -0800
  37. 6eec6d6 Tegra: allow individual SoCs to restore their settings by Varun Wadekar · Thu Mar 03 13:28:10 2016 -0800
  38. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · Mon Feb 22 11:09:41 2016 -0800
  39. 6077dce Tegra: enable PSCI extended state ID processing by Varun Wadekar · Wed Jan 27 11:31:06 2016 -0800
  40. 923d04a Tegra: handlers for common and SoC-specific SiP calls by Varun Wadekar · Wed Dec 09 18:18:53 2015 -0800
  41. d2014c6 Tegra: init normal/crash console for platforms by Varun Wadekar · Thu Oct 29 10:37:28 2015 +0530
  42. 7a9a285 Tegra: Memory Controller Driver (v1) by Varun Wadekar · Fri Sep 18 11:21:22 2015 +0530
  43. b24dea9 Tegra: enable processor retention and L2/CPUECTLR access by Varun Wadekar · Tue Sep 22 13:33:56 2015 +0530
  44. 97f2490 Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platform by Varun Wadekar · Wed Sep 09 11:29:24 2015 +0530
  45. cbdace1 Tegra: SoC specific SiP handlers by Varun Wadekar · Thu Sep 03 14:32:44 2015 +0530
  46. a1176ba Tegra: include flowctlr driver from SoC specific makefiles by Varun Wadekar · Tue Aug 25 17:01:06 2015 +0530
  47. e82e29c Implement plat_get_syscnt_freq2 on platforms by Antonio Nino Diaz · Thu May 19 10:00:28 2016 +0100
  48. 3c0087a Move `plat_get_syscnt_freq()` to arm_common.c by Yatharth Kochar · Thu Apr 14 14:49:37 2016 +0100
  49. a78bb1b Tegra: remove support for legacy platform APIs by Varun Wadekar · Fri Aug 07 10:03:00 2015 +0530
  50. 8b82fae Tegra: introduce per-soc system reset handler by Varun Wadekar · Mon Nov 09 17:39:28 2015 -0800
  51. 4e9c231 Tegra210: wait for 512 timer ticks before retention entry by Varun Wadekar · Fri Aug 21 15:56:02 2015 +0530
  52. e98a146 Tegra132: set TZDRAM_BASE to 0xF5C00000 by Varun Wadekar · Fri Jul 31 10:15:41 2015 +0530
  53. bc78744 Tegra210: enable WRAP to INCR burst type conversions by Varun Wadekar · Mon Jul 27 13:00:50 2015 +0530
  54. 0f3baa0 Tegra: Support for Tegra's T132 platforms by Varun Wadekar · Thu Jul 16 11:36:33 2015 +0530
  55. 254441d Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · Thu Jul 23 10:07:54 2015 +0530
  56. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · Tue Jul 21 11:53:35 2015 +0530
  57. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · Thu Jul 16 09:46:28 2015 +0530
  58. 6cab707 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · Thu Jul 16 11:58:19 2015 +0530
  59. 071b787 Tegra210: deassert CPU reset signals during power on by Varun Wadekar · Wed Jul 08 17:42:02 2015 +0530
  60. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · Fri Jul 03 16:31:28 2015 +0530
  61. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · Tue May 19 16:48:04 2015 +0530