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git01.mediatek.com / filogic / atf / 7b834ad9bc7ca447b78fa59ec947393bf983e056 / plat / nvidia / tegra / soc / t186 / plat_memctrl.c
  1. 07f970d Tegra186: store TZDRAM base/size to scratch registers by Varun Wadekar · Thu Jun 28 11:03:41 2018 -0700
  2. 17fb18e Tegra186: memctrl: lock stream id security config by Pritesh Raithatha · Thu May 31 12:06:15 2018 +0530
  3. 1cd88d8 Tegra186: remove ENABLE_AFI_DEVICE macro usage by Varun Wadekar · Fri Jan 25 09:38:14 2019 -0800
  4. ae18d22 Tegra186: memctrl: disable stream id writes for MC clients by Krishna Reddy · Thu Dec 07 13:52:39 2017 -0800
  5. a457f2e Tegra: memctrl_v2: platform handler for TZDRAM setup by Steven Kao · Tue Nov 14 18:52:05 2017 +0800
  6. 186485e Tegra: rename secure scratch register macros by Steven Kao · Mon Oct 23 18:22:09 2017 +0800
  7. f3cd509 Tegra: memctrl_v2: platform handler for TZDRAM settings by Varun Wadekar · Mon Oct 30 14:35:17 2017 -0700
  8. cf8c0e2 Tegra: memctrl_v2: platform handlers to program MSS by Puneet Saxena · Fri Aug 04 17:19:55 2017 +0530
  9. 0e07e45 Tegra: fix defects flagged by MISRA Rule 10.3 by Anthony Zhou · Wed Jul 26 17:16:54 2017 +0800
  10. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  11. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  12. 9eb5db5 Tegra: memctrl_v2: platform handler for MC settings by Pritesh Raithatha · Mon Jan 02 19:42:31 2017 +0530