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git01.mediatek.com / filogic / atf / 7b753d9841759567be791481048283c219f6962b / plat / intel / soc / common / socfpga_sip_svc.c
  1. c39a0e0 intel: Include address range check for SiP Mailbox by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 9 months ago
  2. a33e810 intel: Introduce SMC support for mailbox command by Hadi Asyrafi · 4 years, 11 months ago
  3. 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · 4 years, 11 months ago
  4. 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · 4 years, 11 months ago
  5. 0c6dae2 intel: FPGA config_isdone() status query by Hadi Asyrafi · 4 years, 11 months ago
  6. cee6aa9 intel: Change all global sip function to static by Hadi Asyrafi · 4 years, 11 months ago
  7. 6794230 intel: Enable SiP SMC secure register access by Hadi Asyrafi · 5 years ago
  8. f3a7c14 intel: Fix SMC SIP service by Hadi Asyrafi · 5 years ago
  9. 9dfc047 intel: Introduce mailbox response length handling by Hadi Asyrafi · 5 years ago
  10. 500b232 plat: intel: Fix FPGA manager on reconfiguration by Tien Hock, Loh · 5 years ago
  11. c516816 intel: Modify mailbox's get_config_status by Hadi Asyrafi · 5 years ago
  12. ab1132f intel: Create SiP service header file by Hadi Asyrafi · 5 years ago
  13. 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · 5 years ago[Renamed (99%) from plat/intel/soc/agilex/socfpga_sip_svc.c]
  14. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · 5 years ago
  15. 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · 5 years ago