Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
783fd7c488a85bd055b686e2ed1e036afa19dfea
/
docs
/
plat
69ce101
Tegra: enable ECC/Parity protection for Cortex-A57 CPUs
by Varun Wadekar
· 9 years ago
d2014c6
Tegra: init normal/crash console for platforms
by Varun Wadekar
· 9 years ago
6bb6246
Tegra: add tzdram_base to plat_params_from_bl2 struct
by Varun Wadekar
· 9 years ago
ac27f4f
zynqmp: remove RESET_TO_BL31=1 from build instruction
by Masahiro Yamada
· 8 years ago
e4862e2
Merge pull request #651 from Xilinx/zynqmp_uart
by danh-arm
· 8 years ago
99c0d7b
zynqmp: Add option to select between Cadence UARTs
by Soren Brinkmann
· 8 years ago
bb272b4
Merge pull request #650 from Xilinx/zynqmp-updates
by danh-arm
· 8 years ago
52c798e
Add support for QEMU virt ARMv8-A target
by Jens Wiklander
· 9 years ago
ef8f559
zynqmp: FSBL->ATF handover
by Michal Simek
· 9 years ago
4a9ca04
zynqmp: Revise memory configuration options
by Soren Brinkmann
· 9 years ago
76fcae3
Add support for Xilinx Zynq UltraScale+ MPSOC
by Soren Brinkmann
· 9 years ago
f3b823a
docs: fix the command to compile BL31 on Tegra
by Varun Wadekar
· 9 years ago
e98a146
Tegra132: set TZDRAM_BASE to 0xF5C00000
by Varun Wadekar
· 9 years ago
f5bd697
tlkd: delete 'NEED_BL32' build variable
by Varun Wadekar
· 9 years ago
0f3baa0
Tegra: Support for Tegra's T132 platforms
by Varun Wadekar
· 9 years ago
81b1383
Implement get_sys_suspend_power_state() handler for Tegra
by Varun Wadekar
· 9 years ago
52a1598
Boot Trusted OS' on Tegra SoCs
by Varun Wadekar
· 9 years ago
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· 9 years ago