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filogic
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atf
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77389b2703553fc0b4a73858a8c4c4abbc9aabff
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plat
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xilinx
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zynqmp
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bl31_zynqmp_setup.c
53f193f
zynqmp: add support for multi console interface
by Ambroise Vincent
· 5 years ago
de97ff3
Remove duplicated definitions of linker symbols
by Antonio Nino Diaz
· 6 years ago
bd7b740
plat/arm: Sanitise includes
by Antonio Nino Diaz
· 6 years ago
0bfd700
plat: xilinx: zynqmp: Move zynqmp_private.h to include directory
by Jolly Shah
· 6 years ago
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· 6 years ago
344ff02
Convert arm_setup_page_tables into a generic helper
by Roberto Vargas
· 6 years ago
d653d33
Replace S-EL3 references by EL3
by John Tsichritzis
· 6 years ago
012c8bf
zynqmp: Migrate to new interfaces
by Antonio Nino Diaz
· 6 years ago
45a2c9e
Rework page table setup for varying number of mem regions
by Daniel Boulby
· 6 years ago
efd431b
zynqmp: Add wdt timeout restart functionality
by Siva Durga Prasad Paladugu
· 7 years ago
b8d474f
plat: zynqmp: Don't panic() if we can't find the FSBL struct
by Alistair Francis
· 7 years ago
8f49972
plat: zynqmp: Let fsbl_atf_handover() return an error status
by Siva Durga Prasad Paladugu
· 7 years ago
e363146
Fix order of remaining platform #includes
by Isla Mitchell
· 7 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 8 years ago
0fac5af
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
by Masahiro Yamada
· 8 years ago
51bef61
Use *_END instead of *_LIMIT for linker derived end addresses
by Masahiro Yamada
· 8 years ago
cf4e714
zynqmp: Add RW access to L2ACTLR_EL1 and CPUACTLR_EL1
by Naga Sureshkumar Relli
· 8 years ago
6d1ba58
zynqmp: Separate code and rodata
by Soren Brinkmann
· 8 years ago
ecdc4d3
ARM platforms: Add support for SEPARATE_CODE_AND_RODATA
by Sandrine Bailleux
· 8 years ago
4a1267a
Introduce arm_setup_page_tables() function
by Sandrine Bailleux
· 9 years ago
99c0d7b
zynqmp: Add option to select between Cadence UARTs
by Soren Brinkmann
· 8 years ago
ef8f559
zynqmp: FSBL->ATF handover
by Michal Simek
· 9 years ago
76fcae3
Add support for Xilinx Zynq UltraScale+ MPSOC
by Soren Brinkmann
· 9 years ago