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git01.mediatek.com / filogic / atf / 761ca73ce6b0ec486903227d21835adbb2d71ad2 / plat / nvidia / tegra / soc
  1. 254441d Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · 9 years ago
  2. 5f4e643 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · 9 years ago
  3. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · 9 years ago
  4. 6cab707 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · 9 years ago
  5. 071b787 Tegra210: deassert CPU reset signals during power on by Varun Wadekar · 9 years ago
  6. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · 9 years ago
  7. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · 9 years ago