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e1eaf8e
Tegra: memmap the actual memory available for BL31
by Varun Wadekar
· 9 years ago
e98a146
Tegra132: set TZDRAM_BASE to 0xF5C00000
by Varun Wadekar
· 9 years ago
c8bfe2e
Tegra: retrieve BL32's bootargs from bl32_ep_info
by Varun Wadekar
· 9 years ago
bc78744
Tegra210: enable WRAP to INCR burst type conversions
by Varun Wadekar
· 9 years ago
c39b0ba
Tegra: modify 'BUILD_PLAT' to point to soc specific build dirs
by Varun Wadekar
· 9 years ago
0f3baa0
Tegra: Support for Tegra's T132 platforms
by Varun Wadekar
· 9 years ago
254441d
Tegra: implement per-SoC validate_power_state() handler
by Varun Wadekar
· 9 years ago
5f4e643
Tegra: T210: include CPU files from SoC's platform.mk
by Varun Wadekar
· 9 years ago
d1b6150
Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs
by Varun Wadekar
· 9 years ago
6cab707
Tegra210: lock PMC registers holding CPU vector addresses
by Varun Wadekar
· 9 years ago
30d8977
Tegra: PMC: lock SCRATCH22 register
by Varun Wadekar
· 9 years ago
fccf8e0
Tegra: PMC: check if a CPU is already online
by Varun Wadekar
· 9 years ago
071b787
Tegra210: deassert CPU reset signals during power on
by Varun Wadekar
· 9 years ago
85a90cf
Tegra: Fix the delay loop used during SC7 exit
by Varun Wadekar
· 9 years ago
bc74fec
Tegra: introduce delay timer support
by Varun Wadekar
· 9 years ago
207cc73
Tegra: Exclude coherent memory region from memory map
by Varun Wadekar
· 9 years ago
81b1383
Implement get_sys_suspend_power_state() handler for Tegra
by Varun Wadekar
· 9 years ago
d3a4150
Add missing features to the Tegra GIC driver
by Varun Wadekar
· 9 years ago
f9aae8b
Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3
by danh-arm
· 9 years ago
7a269e2
Reserve a Video Memory aperture in DRAM memory
by Varun Wadekar
· 9 years ago
52a1598
Boot Trusted OS' on Tegra SoCs
by Varun Wadekar
· 9 years ago
b316e24
Support for NVIDIA's Tegra T210 SoCs
by Varun Wadekar
· 10 years ago