1. 502ca97 Merge pull request #1105 from antonio-nino-diaz-arm/an/epd1-bit by davidcunado-arm · 7 years ago
  2. f94e40d Fix type of `unsigned long` constants by Antonio Nino Diaz · 7 years ago
  3. c8274a8 Set TCR_EL1.EPD1 bit to 1 by Antonio Nino Diaz · 7 years ago
  4. 02c6307 Helper macro to create MAIR encodings by Isla Mitchell · 7 years ago
  5. c4a1a07 Enable CnP bit for ARMv8.2 CPUs by Isla Mitchell · 7 years ago
  6. ee3457b aarch64: Enable Statistical Profiling Extensions for lower ELs by dp-arm · 7 years ago
  7. fee8653 Fully initialise essential control registers by David Cunado · 8 years ago
  8. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
  9. 6715485 Merge pull request #927 from jeenu-arm/state-switch by davidcunado-arm · 7 years ago
  10. bc1a929 Introduce ARM SiP service to switch execution state by Jeenu Viswambharan · 8 years ago
  11. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  12. 2a9b882 Add macro to check whether the CPU implements an EL by Jeenu Viswambharan · 8 years ago
  13. 7d99b6c Merge branch 'integration' into tf_issue_461 by Scott Branden · 8 years ago
  14. bf404c0 Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · 8 years ago
  15. ede39cb Changes to support execution in AArch32 state for JUNO by Yatharth Kochar · 8 years ago
  16. b4a7294 Tegra: Add support for fake system suspend by Vignesh Radhakrishnan · 8 years ago
  17. d4acf20 Merge pull request #879 from Summer-ARM/sq/mt-support by davidcunado-arm · 8 years ago
  18. 93c812f ARM platforms: Add support for MT bit in MPIDR by Summer Qin · 8 years ago
  19. c4364f6 Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat by davidcunado-arm · 8 years ago
  20. 3f13c35 Apply workaround for errata 813419 of Cortex-A57 by Antonio Nino Diaz · 8 years ago
  21. ac99803 Add dynamic region support to xlat tables lib v2 by Antonio Nino Diaz · 8 years ago
  22. 700ebe5 spd: trusty: pass VMID via X7 by Anthony Zhou · 9 years ago
  23. 595d0d5 Disable secure self-hosted debug via MDCR_EL3/SDCR by dp-arm · 8 years ago
  24. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  25. e40306b Fix declarations of cache maintenance functions by Antonio Nino Diaz · 8 years ago
  26. d1beee2 Add PLAT_xxx_ADDR_SPACE_SIZE definitions by Antonio Nino Diaz · 8 years ago
  27. c14b08e Reset EL2 and EL3 configurable controls by David Cunado · 8 years ago
  28. 5f55e28 Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR by David Cunado · 8 years ago
  29. a993c42 Unify SCTLR initialization for AArch32 normal world by Soby Mathew · 8 years ago
  30. 550bf5e Support for Mediatek MT6795 SoC by developer · 8 years ago
  31. d48ae61 Automatically select initial xlation lookup level by Antonio Nino Diaz · 8 years ago
  32. a9482df AArch32: Add API to invoke runtime service handler by Soby Mathew · 9 years ago
  33. c53ac5e Move SIZE_FROM_LOG2_WORDS macro to utils.h by Soby Mathew · 8 years ago
  34. d019487 Introduce PSCI Library Interface by Soby Mathew · 9 years ago
  35. 44170c4 Refactor the xlat_tables library code by Soby Mathew · 9 years ago
  36. 55f9f4b Merge pull request #577 from antonio-nino-diaz-arm/an/remove-xlat-helpers by danh-arm · 9 years ago
  37. 346f1f9 Remove xlat_helpers.c by Antonio Nino Diaz · 9 years ago
  38. 851dc7e Add ISR_EL1 to crash report by Gerald Lejeune · 9 years ago
  39. 6af70f5 Remove DAIF bits handling macros by Gerald Lejeune · 9 years ago
  40. 52b1ba6 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · 9 years ago
  41. 2e86cb1 ARM platforms: rationalise memory attributes of shared memory by Juan Castillo · 9 years ago
  42. 8b0eafe Initialize VTTBR_EL2 when bypassing EL2 by Sandrine Bailleux · 9 years ago
  43. 92712a5 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · 9 years ago
  44. 94efd1f Add missing RES1 bit in SCTLR_EL1 by Vikram Kanigiri · 9 years ago
  45. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · 9 years ago
  46. 0cdebbd Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · 10 years ago
  47. 2eb68ca Merge pull request #280 from vwadekar/tlkd-fixed-v3 by danh-arm · 10 years ago
  48. 97625e3 Translate secure/non-secure virtual addresses by Varun Wadekar · 10 years ago
  49. 4e97e54 Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · 10 years ago
  50. 26fb90e Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · 10 years ago
  51. ed99566 Add macros for domain specific barriers. by Soby Mathew · 10 years ago
  52. 30c231b Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · 10 years ago
  53. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 10 years ago
  54. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  55. 070a3e0 Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 10 years ago
  56. b08bc04 Create BL stage specific translation tables by Soby Mathew · 10 years ago
  57. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  58. feddfcf Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 10 years ago
  59. 798140d Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  60. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  61. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  62. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  63. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  64. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  65. e998254 Make enablement of the MMU more flexible by Achin Gupta · 10 years ago
  66. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · 10 years ago
  67. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  68. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  69. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 10 years ago
  70. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · 10 years ago
  71. 1359236 Enable mapping higher physical address by Lin Ma · 10 years ago
  72. b226a4d Add enable mmu platform porting interfaces by Dan Handley · 10 years ago
  73. ed6ff95 Split platform.h into separate headers by Dan Handley · 10 years ago
  74. a17fefa Remove extern keyword from function declarations by Dan Handley · 10 years ago
  75. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · 11 years ago
  76. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  77. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · 10 years ago
  78. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago
  79. 25232af Introduce IS_IN_ELX() macros by Sandrine Bailleux · 11 years ago
  80. 5879ffd Remove unused or invalid asm helper functions by Andrew Thoelke · 11 years ago
  81. 438c63a Replace disable_mmu with assembler version by Andrew Thoelke · 11 years ago
  82. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · 11 years ago
  83. e2712bc Always use named structs in header files by Dan Handley · 11 years ago
  84. bcd60ba Separate BL functions out of arch.h by Dan Handley · 11 years ago
  85. a70615f Move include and source files to logical locations by Dan Handley · 11 years ago