1. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  2. d87233a Rework smc_unknown return code path in smc_handler by Madhukar Pappireddy · Wed May 08 15:41:41 2019 -0500
  3. dd894cc Fix restoration of PAuth context by Alexei Fedorov · Fri Apr 05 13:44:30 2019 +0100
  4. 3287c4f Restore PAuth context in case of unknown SMC call by Alexei Fedorov · Mon Mar 18 15:59:34 2019 +0000
  5. 25cda67 Add support for pointer authentication by Antonio Nino Diaz · Tue Feb 19 11:53:51 2019 +0000
  6. 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · Thu Jan 31 11:58:00 2019 +0000
  7. 0e402d3 Remove support for the SMC Calling Convention 2.0 by Antonio Nino Diaz · Wed Jan 30 16:01:49 2019 +0000
  8. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  9. f939a6a SPM: Introduce SMC handlers for SPCI and SPRT by Antonio Nino Diaz · Thu Nov 08 14:12:40 2018 +0000
  10. d1198ad BL31: Use helper function to save registers in SMC handler by Soby Mathew · Fri Nov 16 15:43:34 2018 +0000
  11. 911fcc9 RAS: Introduce handler for EL3 EAs by Jeenu Viswambharan · Fri Jul 06 16:50:06 2018 +0100
  12. e86a247 RAS: Move EA handling to a separate file by Jeenu Viswambharan · Thu Jul 05 15:24:45 2018 +0100
  13. 95f30ab Add end_vector_entry assembler macro by Roberto Vargas · Tue Apr 17 11:31:43 2018 +0100
  14. 9a7ce2f AArch64: Introduce RAS handling by Jeenu Viswambharan · Wed Apr 04 16:07:11 2018 +0100
  15. 96c7df0 AArch64: Introduce External Abort handling by Jeenu Viswambharan · Thu Nov 30 12:54:15 2017 +0000
  16. 23d05a8 AArch64: Refactor GP register restore to separate function by Jeenu Viswambharan · Wed Nov 29 16:59:34 2017 +0000
  17. 35c8cfc Add support for the SMC Calling Convention 2.0 by Antonio Nino Diaz · Mon Apr 23 15:43:29 2018 +0100
  18. e4794b7 Redefine SMC_UNK as -1 instead of 0xFFFFFFFF by Antonio Nino Diaz · Wed Feb 14 14:22:29 2018 +0000
  19. 0415951 runtime_exceptions: Save x4-x29 unconditionally by Dimitris Papastamos · Mon Jan 22 11:53:04 2018 +0000
  20. 446f7f1 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · Thu Nov 30 14:53:53 2017 +0000
  21. 67ebde7 Fix x30 reporting for unhandled exceptions by Julius Werner · Thu Jul 27 14:59:34 2017 -0700
  22. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  23. 68aef10 Define and use no_ret macro where no return is expected by Jeenu Viswambharan · Wed Nov 30 15:21:11 2016 +0000
  24. 0980eed Cosmetic change to exception table by Douglas Raillard · Wed Nov 09 17:48:27 2016 +0000
  25. 3cac786 Add PMF instrumentation points in TF by dp-arm · Mon Sep 19 11:18:44 2016 +0100
  26. 9e6ad6c Introduce some helper macros for exception vectors by Sandrine Bailleux · Tue May 24 16:56:03 2016 +0100
  27. 6c0566c Move context management code to common location by Yatharth Kochar · Fri Oct 02 17:56:48 2015 +0100
  28. c5204fa Remove the IMF_READ_INTERRUPT_ID build option by Soby Mathew · Tue Oct 27 10:01:06 2015 +0000
  29. 979992e Fix handling of spurious interrupts in BL3_1 by Achin Gupta · Wed May 13 17:57:18 2015 +0100
  30. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  31. 046cd3f Miscellaneous documentation fixes by Sandrine Bailleux · Wed Aug 06 11:27:23 2014 +0100
  32. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · Mon Aug 04 23:13:10 2014 +0100
  33. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · Mon Jul 28 14:28:40 2014 +0100
  34. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · Wed Jun 25 10:07:40 2014 +0100
  35. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · Thu Jun 26 09:58:52 2014 +0100
  36. 93c89ec Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · Wed May 28 17:14:36 2014 +0100
  37. 799f0ab Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · Tue May 27 16:54:31 2014 +0100
  38. 701fea7 Further renames of platform porting functions by Dan Handley · Tue May 27 16:17:21 2014 +0100
  39. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  40. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · Fri May 09 11:07:09 2014 +0100
  41. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · Mon Apr 07 15:28:55 2014 +0100
  42. 6c5192a Preserve x19-x29 across world switch for exception handling by Soby Mathew · Wed Apr 30 15:36:37 2014 +0100
  43. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  44. 714a0d2 Make use of user/system includes more consistent by Dan Handley · Wed Apr 09 13:13:04 2014 +0100
  45. 65668f9 Allocate single stacks for BL1 and BL2 by Andrew Thoelke · Thu Mar 20 10:48:23 2014 +0000
  46. 38bde41 Place assembler functions in separate sections by Andrew Thoelke · Tue Mar 18 13:46:55 2014 +0000
  47. 9d8ba4c Move per cpu exception stack in BL31 to tzfw_normal_stacks by Vikram Kanigiri · Thu Mar 20 16:27:01 2014 +0000
  48. a7934d6 Add exception vector guards by Jeenu Viswambharan · Fri Feb 07 15:53:18 2014 +0000
  49. caa8493 Add support for handling runtime service requests by Jeenu Viswambharan · Thu Feb 06 10:36:15 2014 +0000
  50. b739f22 Setup VBAR_EL3 incrementally by Achin Gupta · Sat Jan 18 16:50:09 2014 +0000
  51. e83b0ca Update year in copyright text to 2014 by Dan Handley · Tue Jan 14 18:17:09 2014 +0000
  52. 4a826dd rework general purpose registers save and restore by Achin Gupta · Mon Nov 25 14:00:56 2013 +0000
  53. ab2d31e Enable third party contributions by Dan Handley · Mon Dec 02 19:25:12 2013 +0000
  54. 8d69a03 Various improvements/cleanups on the linker scripts by Sandrine Bailleux · Wed Nov 27 09:38:52 2013 +0000
  55. 4f6ad66 ARMv8 Trusted Firmware release v0.2 by Achin Gupta · Fri Oct 25 09:08:21 2013 +0100