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git01.mediatek.com / filogic / atf / 6e45f94181e21ebb0a74b3304de989a669559646 / plat / xilinx / zynqmp / include / platform_def.h
  1. 19334d0 fix(zynqmp): move debug bl31 based address back to OCM by Michal Simek · Thu Aug 04 09:18:06 2022 +0200
  2. dfbb093 fix(zynqmp): move bl31 with DEBUG=1 back to OCM by Michal Simek · Wed Jun 15 14:19:56 2022 +0200
  3. ed4f1e8 fix(zynqmp): resolve misra 7.2 warnings by Venkatesh Yadav Abbarapu · Fri Apr 29 09:58:30 2022 +0530
  4. 586e192 feat(zynqmp): increase the max xlat tables when debug build is enabled by Venkatesh Yadav Abbarapu · Tue Mar 01 22:10:05 2022 -0700
  5. ed22a34 feat(plat/zynqmp): fix section `coherent_ram' will not fit in region `RAM' by Giulio Benetti · Sat Feb 05 09:42:29 2022 +0100
  6. 53865b0 feat(plat/zynqmp): extend DT description by TF-A by Michal Simek · Thu May 27 09:42:37 2021 +0200
  7. e1407fc feat(plat/zynqmp): add SDEI support by Jan Kiszka · Tue Jul 14 22:36:59 2020 +0200
  8. b16bada xilinx: Unify Platform specific defines for PSCI module by Deepika Bhavnani · Fri Dec 13 10:53:56 2019 -0600
  9. afa91db Arm platforms: Rename PLAT_ARM_NS_IMAGE_OFFSET by Sandrine Bailleux · Thu Jan 31 15:01:32 2019 +0100
  10. 16fe5ab plat: xilinx: zynqmp: Move zynqmp_def.h to include directory by Jolly Shah · Tue Jan 08 11:16:16 2019 -0800
  11. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  12. 6f3ccc5 PSCI: Fix types of definitions by Antonio Nino Diaz · Fri Jul 20 09:17:26 2018 +0100
  13. ee1a114 plat: xilinx: zynqmp: Build for DDR if SPD is enabled by Siva Durga Prasad Paladugu · Wed Jun 20 17:01:13 2018 +0530
  14. efd431b zynqmp: Add wdt timeout restart functionality by Siva Durga Prasad Paladugu · Mon Apr 30 20:12:12 2018 +0530
  15. 8f5ddb3 zynqmp: Use DDR memory when DEBUG is enabled by Jolly Shah · Tue Jan 30 11:31:53 2018 -0800
  16. c150312 Update ULL() macro and instances of ull to comply with MISRA by David Cunado · Fri Feb 16 21:12:58 2018 +0000
  17. 9bde130 zynqmp: Migrate to using interrupt properties by Jeenu Viswambharan · Fri Sep 29 11:15:18 2017 +0100
  18. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  19. 6a9e03e zynqmp: Migrate to new address space macros by Soren Brinkmann · Fri Jan 06 11:07:00 2017 -0800
  20. 1209b26 zynqmp: Remove dead code by Soren Brinkmann · Wed Nov 16 15:50:14 2016 -0800
  21. 7ac746c zynqmp: Increase MAX_XLAT_TABLES by Soren Brinkmann · Mon Jul 25 10:33:53 2016 -0700
  22. 802ba1d zynqmp: Change default BL31 address space by Soren Brinkmann · Fri Jul 15 06:23:37 2016 -0700
  23. 6d1ba58 zynqmp: Separate code and rodata by Soren Brinkmann · Fri Jul 08 14:45:14 2016 -0700
  24. 845cd5c zynqmp: Reduce mapped memory area by Soren Brinkmann · Fri Apr 22 10:02:46 2016 -0700
  25. 4a9ca04 zynqmp: Revise memory configuration options by Soren Brinkmann · Thu Apr 14 10:27:00 2016 -0700
  26. 76fcae3 Add support for Xilinx Zynq UltraScale+ MPSOC by Soren Brinkmann · Sun Mar 06 20:16:27 2016 -0800