- 6e0e1b5 fix(intel): update system counter back to 400MHz by Sieu Mun Tang · 6 months ago
- e7ab132 Merge "fix(intel): fix hardcoded mpu frequency ticks" into integration by Sandrine Bailleux · 7 months ago
- ffa06e7 fix(intel): fix hardcoded mpu frequency ticks by Jit Loon Lim · 12 months ago
- 94f4418 Merge "feat(intel): restructure watchdog" into integration by Manish Pandey · 7 months ago
- f6186b2 feat(intel): increase bl2 size limit by Jit Loon Lim · 9 months ago
- 6284537 feat(intel): restructure watchdog by Sieu Mun Tang · 1 year, 1 month ago
- 4c249f1 feat(intel): platform enablement for Agilex5 SoC FPGA by Jit Loon Lim · 1 year, 2 months ago
- 86f6fb3 feat(intel): restructure sys mgr for Agilex by Jit Loon Lim · 1 year, 2 months ago
- f48707a feat(intel): implement timer init divider via CPU frequency for N5X by Sieu Mun Tang · 2 years ago
- 2cebbc6 Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration by Madhukar Pappireddy · 2 years, 2 months ago
- a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · 2 years, 3 months ago
- 82cf5df feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge by Sieu Mun Tang · 2 years, 2 months ago
- 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · 4 years ago
- a544da1 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · 2 years, 4 months ago
- 786db4d intel: Change boot source selection by Hadi Asyrafi · 4 years, 6 months ago
- 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · 4 years, 6 months ago
- 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · 4 years, 6 months ago
- 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · 4 years, 8 months ago