Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / 6da8794fe06db376f58dda601e3668d2670c2bc1 / plat / xilinx / versal_net / include / platform_def.h
  1. 6da8794 fix(xilinx): rename macros to align with ARM by Jay Buddhabhatti · 9 months ago
  2. efefcd4 feat(versal-net): ddr address reservation in dtb at runtime by Amit Nagal · 12 months ago
  3. c5b04f5 fix(versal-net): fix BLXX memory limits for user defined values by Michal Simek · 1 year, 1 month ago
  4. 2a47faa style(xilinx): replace ARM by Arm in copyrights by Michal Simek · 1 year, 3 months ago
  5. a63b354 refactor(versal): move set wake src fn to common place by Jay Buddhabhatti · 1 year, 4 months ago
  6. 6a44ad0 refactor(xilinx): rename gic macros to make common by Jay Buddhabhatti · 1 year, 4 months ago
  7. 3980f19 fix(versal_net): fix irq for IPI0 by Trung Tran · 1 year, 4 months ago
  8. 9179436 feat(versal-net): add support for Xilinx Versal NET platform by Michal Simek · 1 year, 10 months ago