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git01.mediatek.com / filogic / atf / 6b8bf344ba173cc33621cd134ea5c7c23e192504 / fdts / tc3-4-base.dtsi
  1. 12129d9 fix(tc): modify DPU configuration in dts for TC4 FPGA by Jagdish Gediya · Mon Jul 01 05:29:19 2024 +0000
  2. 60e09fb refactor(tc): remove redundant macro UARTCLK_FREQ by Jagdish Gediya · Fri Jun 28 11:00:18 2024 +0000
  3. 6902909 feat(tc): add MCN PMU nodes in dts for TC4 by Jagdish Gediya · Wed Jun 19 08:52:48 2024 +0000
  4. 3955533 Merge "feat(tc): add devicetree node for AP/RSE MHU" into integration by Manish Pandey · Fri Dec 13 14:30:08 2024 +0100
  5. a64b82a feat(tc): add devicetree node for AP/RSE MHU by Yu Shihai · Mon Jul 08 09:50:02 2024 +0100
  6. 950fdea feat(tc): add dsu pmu node for TC4 by Jagdish Gediya · Wed Jun 19 03:37:48 2024 +0000
  7. 29635be fix(tc): fix the MHUv3 interrupt name in DT by Leo Yan · Mon Nov 11 10:29:17 2024 +0000
  8. 35255f0 feat(tc): add device tree binding for TC4 by Leo Yan · Tue Apr 30 11:27:17 2024 +0100