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git01.mediatek.com / filogic / atf / 6b232d94ab7a6c88efaf77c27dd3754a4eadf158 / include / arch / aarch32 / arch.h
  1. 9074dea AArch32: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
  2. 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · 5 years ago
  3. 007d745 arch: add some defines for generic timer registers by Yann Gautier · 6 years ago
  4. f5fdfbc Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · 6 years ago
  5. 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · 6 years ago
  6. d29d21e drivers: generic_delay_timer: Assert presence of Generic Timer by Antonio Nino Diaz · 6 years ago
  7. c326c34 xlat v2: Dynamically detect need for CnP bit by Antonio Nino Diaz · 6 years ago
  8. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  9. 8d1ade6 Reorganize architecture-dependent header files by Antonio Nino Diaz · 6 years ago[Renamed from include/lib/aarch32/arch.h]
  10. 0f3a004 Merge pull request #1731 from miyatsu/doc-fix-20181225 by Antonio Niño Díaz · 6 years ago