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git01.mediatek.com / filogic / atf / 653fb8f722a6c1845b85513e102db59a96c7e1d0 / lib / cpus / aarch64 / cpu_helpers.S
  1. 815faa8 Use a callee-saved register to be AAPCS-compliant by dp-arm · 8 years ago
  2. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  3. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 8 years ago
  4. 00eefd9 Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 8 years ago
  5. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  6. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  7. 1f5f812 Correct system include order by David Cunado · 8 years ago
  8. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  9. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · 9 years ago
  10. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 9 years ago
  11. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  12. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  13. b5a6304 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 10 years ago
  14. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  15. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  16. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  17. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  18. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  19. f1785fd Add platform API for reset handling by Soby Mathew · 10 years ago
  20. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago