Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
atf
/
650e3301bb19f9c8fdd53ea1072119d81791d330
/
include
/
lib
/
aarch64
6715485
Merge pull request #927 from jeenu-arm/state-switch
by davidcunado-arm
· Thu May 11 16:04:52 2017 +0100
bc1a929
Introduce ARM SiP service to switch execution state
by Jeenu Viswambharan
· Thu Feb 16 14:55:15 2017 +0000
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
2a9b882
Add macro to check whether the CPU implements an EL
by Jeenu Viswambharan
· Tue Feb 21 14:40:44 2017 +0000
7d99b6c
Merge branch 'integration' into tf_issue_461
by Scott Branden
· Sat Apr 29 08:36:12 2017 -0700
bf404c0
Move defines in utils.h to utils_def.h to fix shared header compile issues
by Scott Branden
· Mon Apr 10 11:45:52 2017 -0700
ede39cb
Changes to support execution in AArch32 state for JUNO
by Yatharth Kochar
· Mon Nov 14 12:01:04 2016 +0000
b4a7294
Tegra: Add support for fake system suspend
by Vignesh Radhakrishnan
· Fri Mar 03 10:58:05 2017 -0800
d4acf20
Merge pull request #879 from Summer-ARM/sq/mt-support
by davidcunado-arm
· Tue Mar 28 18:15:20 2017 +0100
93c812f
ARM platforms: Add support for MT bit in MPIDR
by Summer Qin
· Tue Feb 28 16:46:17 2017 +0000
c4364f6
Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat
by davidcunado-arm
· Thu Mar 16 12:42:32 2017 +0000
3f13c35
Apply workaround for errata 813419 of Cortex-A57
by Antonio Nino Diaz
· Fri Feb 24 11:39:22 2017 +0000
ac99803
Add dynamic region support to xlat tables lib v2
by Antonio Nino Diaz
· Mon Feb 27 17:23:54 2017 +0000
700ebe5
spd: trusty: pass VMID via X7
by Anthony Zhou
· Sat Oct 31 06:03:41 2015 +0800
595d0d5
Disable secure self-hosted debug via MDCR_EL3/SDCR
by dp-arm
· Wed Feb 08 11:51:50 2017 +0000
d5ec367
Report errata workaround status to console
by Jeenu Viswambharan
· Tue Jan 03 11:01:51 2017 +0000
e40306b
Fix declarations of cache maintenance functions
by Antonio Nino Diaz
· Fri Jan 13 15:03:07 2017 +0000
d1beee2
Add PLAT_xxx_ADDR_SPACE_SIZE definitions
by Antonio Nino Diaz
· Tue Dec 13 15:28:54 2016 +0000
c14b08e
Reset EL2 and EL3 configurable controls
by David Cunado
· Fri Nov 25 00:21:59 2016 +0000
5f55e28
Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR
by David Cunado
· Mon Oct 31 17:37:34 2016 +0000
a993c42
Unify SCTLR initialization for AArch32 normal world
by Soby Mathew
· Thu Sep 29 14:15:57 2016 +0100
550bf5e
Support for Mediatek MT6795 SoC
by developer
· Mon Jul 11 16:05:23 2016 +0800
d48ae61
Automatically select initial xlation lookup level
by Antonio Nino Diaz
· Tue Aug 02 09:21:41 2016 +0100
a9482df
AArch32: Add API to invoke runtime service handler
by Soby Mathew
· Thu May 05 12:49:09 2016 +0100
c53ac5e
Move SIZE_FROM_LOG2_WORDS macro to utils.h
by Soby Mathew
· Wed Jul 20 14:38:36 2016 +0100
d019487
Introduce PSCI Library Interface
by Soby Mathew
· Fri Apr 29 19:01:30 2016 +0100
44170c4
Refactor the xlat_tables library code
by Soby Mathew
· Tue Mar 22 15:51:08 2016 +0000
55f9f4b
Merge pull request #577 from antonio-nino-diaz-arm/an/remove-xlat-helpers
by danh-arm
· Fri Apr 01 17:41:10 2016 +0100
346f1f9
Remove xlat_helpers.c
by Antonio Nino Diaz
· Thu Mar 31 09:08:56 2016 +0100
851dc7e
Add ISR_EL1 to crash report
by Gerald Lejeune
· Tue Mar 22 11:11:46 2016 +0100
6af70f5
Remove DAIF bits handling macros
by Gerald Lejeune
· Tue Mar 22 11:07:04 2016 +0100
52b1ba6
Extend memory attributes to map non-cacheable memory
by Sandrine Bailleux
· Tue Mar 01 14:01:03 2016 +0000
2e86cb1
ARM platforms: rationalise memory attributes of shared memory
by Juan Castillo
· Wed Jan 13 15:01:09 2016 +0000
8b0eafe
Initialize VTTBR_EL2 when bypassing EL2
by Sandrine Bailleux
· Wed Nov 25 17:00:44 2015 +0000
92712a5
Add ARM GICv3 driver without support for legacy operation
by Achin Gupta
· Thu Sep 03 14:18:02 2015 +0100
94efd1f
Add missing RES1 bit in SCTLR_EL1
by Vikram Kanigiri
· Wed Jul 22 11:53:52 2015 +0100
e9c4a64
Make generic code work in presence of system caches
by Achin Gupta
· Fri Sep 11 16:03:13 2015 +0100
0cdebbd
Remove use of PLATFORM_CACHE_LINE_SIZE
by Dan Handley
· Mon Mar 30 17:15:16 2015 +0100
2eb68ca
Merge pull request #280 from vwadekar/tlkd-fixed-v3
by danh-arm
· Wed Apr 01 11:36:08 2015 +0100
97625e3
Translate secure/non-secure virtual addresses
by Varun Wadekar
· Fri Mar 13 14:59:03 2015 +0530
4e97e54
Use ARM CCI driver on FVP and Juno platforms
by Vikram Kanigiri
· Thu Feb 26 15:25:58 2015 +0000
26fb90e
Return success if an interrupt is seen during PSCI CPU_SUSPEND
by Soby Mathew
· Tue Jan 06 21:36:55 2015 +0000
ed99566
Add macros for domain specific barriers.
by Soby Mathew
· Tue Dec 30 16:11:42 2014 +0000
30c231b
Prevent optimisation of sysregs accessors calls
by Sandrine Bailleux
· Wed Jan 07 16:36:11 2015 +0000
e2b2d8f
Fix the array size of mpidr_aff_map_nodes_t.
by Soby Mathew
· Thu Dec 04 14:14:12 2014 +0000
c088433
Apply errata workarounds only when major/minor revisions match.
by Soby Mathew
· Mon Sep 22 12:11:36 2014 +0100
070a3e0
Merge pull request #206 from soby-mathew/sm/reset_cntvoff
by Andrew Thoelke
· Fri Oct 10 12:13:48 2014 +0100
b08bc04
Create BL stage specific translation tables
by Soby Mathew
· Wed Sep 03 17:48:44 2014 +0100
c93c9df
Initialize SCTLR_EL1 based on MODE_RW bit
by Jens Wiklander
· Thu Sep 04 10:23:27 2014 +0200
feddfcf
Reset CNTVOFF_EL2 register before exit into EL1 on warm boot
by Soby Mathew
· Fri Aug 29 14:41:58 2014 +0100
798140d
Juno: Implement initial platform port
by Sandrine Bailleux
· Thu Jul 17 16:06:39 2014 +0100
802f865
Add support for selected Cortex-A57 errata workarounds
by Soby Mathew
· Thu Aug 14 16:19:29 2014 +0100
38b4bc9
Add CPU specific crash reporting handlers
by Soby Mathew
· Thu Aug 14 13:36:41 2014 +0100
8e2f287
Add CPU specific power management operations
by Soby Mathew
· Thu Aug 14 12:49:05 2014 +0100
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· Thu Aug 14 11:33:56 2014 +0100
9f09835
Simplify management of SCTLR_EL3 and SCTLR_EL1
by Achin Gupta
· Fri Jul 18 18:38:28 2014 +0100
e998254
Make enablement of the MMU more flexible
by Achin Gupta
· Thu Jun 26 08:59:07 2014 +0100
741a382
Calculate TCR bits based on VA and PA
by Lin Ma
· Fri Jun 27 16:56:30 2014 -0700
2d55240
Remove all checkpatch errors from codebase
by Juan Castillo
· Fri Jun 13 17:05:10 2014 +0100
4e12607
Initialise CPU contexts from entry_point_info
by Andrew Thoelke
· Wed Jun 04 21:10:52 2014 +0100
ddb312d
Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2
by danh-arm
· Mon Jun 16 12:41:48 2014 +0100
3f78dc3
Make system register functions inline assembly
by Andrew Thoelke
· Mon Jun 02 15:44:43 2014 +0100
1359236
Enable mapping higher physical address
by Lin Ma
· Mon Jun 02 11:45:36 2014 -0700
b226a4d
Add enable mmu platform porting interfaces
by Dan Handley
· Fri May 16 14:08:45 2014 +0100
ed6ff95
Split platform.h into separate headers
by Dan Handley
· Wed May 14 17:44:19 2014 +0100
a17fefa
Remove extern keyword from function declarations
by Dan Handley
· Wed May 14 12:38:32 2014 +0100
405406d
Use secure timer to generate S-EL1 interrupts
by Achin Gupta
· Fri May 09 12:00:17 2014 +0100
27b895e
Add context library API to change a bit in SCR_EL3
by Achin Gupta
· Sun May 04 18:38:28 2014 +0100
9851e42
Introduce macros to manipulate the SPSR
by Vikram Kanigiri
· Tue May 13 14:42:08 2014 +0100
5e5c207
Rework BL3-1 unhandled exception handling and reporting
by Soby Mathew
· Mon Apr 07 15:28:55 2014 +0100
25232af
Introduce IS_IN_ELX() macros
by Sandrine Bailleux
· Fri May 09 11:23:11 2014 +0100
5879ffd
Remove unused or invalid asm helper functions
by Andrew Thoelke
· Mon Apr 28 12:33:52 2014 +0100
438c63a
Replace disable_mmu with assembler version
by Andrew Thoelke
· Mon Apr 28 12:06:18 2014 +0100
2bd4ef2
Reduce deep nesting of header files
by Dan Handley
· Wed Apr 09 13:14:54 2014 +0100
e2712bc
Always use named structs in header files
by Dan Handley
· Thu Apr 10 15:37:22 2014 +0100
bcd60ba
Separate BL functions out of arch.h
by Dan Handley
· Thu Apr 17 18:53:42 2014 +0100
a70615f
Move include and source files to logical locations
by Dan Handley
· Wed Apr 09 12:48:25 2014 +0100