1. efb1f33 Check presence of fix for errata 843419 in Cortex-A53 by Jonathan Wright · 7 years ago
  2. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 7 years ago
  3. 780cc95 Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  4. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 7 years ago
  5. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  6. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  7. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  8. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  9. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  10. ea59668 Add header guards to asm macro files by Dan Handley · 10 years ago
  11. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  12. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  13. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago[Renamed (89%) from include/lib/aarch64/cpu_macros.S]
  14. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago[Copied (63%) from lib/aarch64/cpu_helpers.S]
  15. c61399b Merge pull request #191 from danh-arm/jc/tf-issues/218 by danh-arm · 10 years ago