1. 88de358 Merge pull request #841 from dp-arm/dp/debug-regs by danh-arm · Mon Feb 20 13:58:48 2017 +0000
  2. 595d0d5 Disable secure self-hosted debug via MDCR_EL3/SDCR by dp-arm · Wed Feb 08 11:51:50 2017 +0000
  3. 21362a9 Introduce unified API to zero memory by Douglas Raillard · Fri Dec 02 13:51:54 2016 +0000
  4. 54ec86a Allow spin locks to be defined from assembly by Jeenu Viswambharan · Thu Jan 19 14:23:36 2017 +0000
  5. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · Sun Dec 25 23:36:24 2016 +0900
  6. 2b7d7ae Merge pull request #791 from jeenu-arm/asm-assert-32 by danh-arm · Tue Dec 20 17:00:32 2016 +0000
  7. b0e529b Export is_mem_free() function by Sandrine Bailleux · Tue Nov 08 14:27:10 2016 +0000
  8. ff640c4 AArch32: Print ASM_ASSERT and panic messages by Jeenu Viswambharan · Mon Nov 28 09:59:27 2016 +0000
  9. 975d08c Merge pull request #774 from jeenu-arm/no-return-macro by danh-arm · Mon Dec 12 14:29:01 2016 +0000
  10. 68aef10 Define and use no_ret macro where no return is expected by Jeenu Viswambharan · Wed Nov 30 15:21:11 2016 +0000
  11. c14b08e Reset EL2 and EL3 configurable controls by David Cunado · Fri Nov 25 00:21:59 2016 +0000
  12. 1c0e208 Add CFI debug frame information for ASM functions by Douglas Raillard · Mon Nov 21 14:12:32 2016 +0000
  13. 5f55e28 Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR by David Cunado · Mon Oct 31 17:37:34 2016 +0000
  14. c44c5af AArch32: Add `memcpy4` function in assembly by Yatharth Kochar · Wed Sep 28 11:00:05 2016 +0100
  15. 89256b8 PSCI: Introduce PSCI Library argument structure by Soby Mathew · Tue Sep 13 14:19:08 2016 +0100
  16. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · Tue Jun 28 16:58:26 2016 +0100
  17. 3345a8d Add new version of image loading. by Yatharth Kochar · Mon Sep 12 16:08:41 2016 +0100
  18. 748be1d AArch32: Add support in TF libraries by Soby Mathew · Thu May 05 14:10:46 2016 +0100
  19. a9482df AArch32: Add API to invoke runtime service handler by Soby Mathew · Thu May 05 12:49:09 2016 +0100
  20. d29f67b AArch32: Add assembly helpers by Soby Mathew · Thu May 05 12:31:57 2016 +0100
  21. b9ff2fd Rearrange assembly helper macros by Soby Mathew · Fri Jul 08 15:26:35 2016 +0100
  22. d019487 Introduce PSCI Library Interface by Soby Mathew · Fri Apr 29 19:01:30 2016 +0100
  23. 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · Thu Mar 24 16:56:29 2016 +0000
  24. 24ab34f Fix coding guideline warnings by Soby Mathew · Tue May 03 17:11:42 2016 +0100
  25. a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · Thu Jun 16 14:52:04 2016 +0100
  26. ba39fc6 Merge pull request #662 from sandrine-bailleux-arm/sb/rodata-xn by danh-arm · Fri Jul 15 18:55:43 2016 +0100
  27. f91f144 Introduce SEPARATE_CODE_AND_RODATA build flag by Sandrine Bailleux · Fri Jul 08 14:37:40 2016 +0100
  28. 7659a26 Introduce utils.h header file by Sandrine Bailleux · Tue Jul 05 09:55:03 2016 +0100
  29. bfdbecf Derive stack alignment from CACHE_WRITEBACK_GRANULE by Soby Mathew · Thu Jun 09 17:16:35 2016 +0100
  30. a913dee Merge pull request #636 from soby-mathew/sm/cpu_ctx_rem_aarch32_regs by danh-arm · Fri Jun 03 15:12:37 2016 +0100
  31. d75d2ba Build option to include AArch32 registers in cpu context by Soby Mathew · Tue May 17 14:01:32 2016 +0100
  32. 618ba99 Fill exception vectors with zero bytes by Sandrine Bailleux · Tue May 24 16:22:59 2016 +0100
  33. 9e6ad6c Introduce some helper macros for exception vectors by Sandrine Bailleux · Tue May 24 16:56:03 2016 +0100
  34. 37a12df Fix build error with optimizations disabled (-O0) by Sandrine Bailleux · Mon Apr 11 13:17:50 2016 +0100
  35. 074e05a Enable SCR_EL3.SIF bit by Soby Mathew · Mon Apr 04 12:34:24 2016 +0100
  36. 632d6df Enable asynchronous abort exceptions during boot by Gerald Lejeune · Tue Mar 22 09:29:23 2016 +0100
  37. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · Mon Mar 21 10:36:47 2016 +0000
  38. 1f21bcf Remove all non-configurable dead loops by Antonio Nino Diaz · Mon Feb 01 13:57:25 2016 +0000
  39. 0165c11 Merge pull request #541 from antonio-nino-diaz-arm/an/secondary-cpu-init by danh-arm · Wed Mar 09 08:45:23 2016 +0000
  40. 4357b41 Initialize secondary CPUs during cold boot by Antonio Nino Diaz · Tue Feb 23 12:04:58 2016 +0000
  41. f11b29a Fix the inconsistencies in bl1_tbbr_image_descs[] by Yatharth Kochar · Mon Feb 01 11:04:46 2016 +0000
  42. a581bd5 Migrate __warn_deprecated -> __deprecated by Soren Brinkmann · Thu Jan 14 10:02:33 2016 -0800
  43. 6d4f262 Rearrange fields in TF data structures to reduce padding by Soby Mathew · Tue Jan 12 10:30:59 2016 +0000
  44. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · Mon Dec 14 09:35:25 2015 +0000
  45. a72b647 Replace all SCP FW (BL0, BL3-0) references by Juan Castillo · Thu Dec 10 15:49:17 2015 +0000
  46. be80120 TBB: apply TBBR naming convention to certificates and extensions by Juan Castillo · Thu Dec 03 10:19:21 2015 +0000
  47. 4dd39b8 FWU: Add FWU support to `fip_create` tool by Yatharth Kochar · Mon Aug 10 11:57:41 2015 +0100
  48. b1c2fe0 FWU: Add Generic BL2U FWU image support in BL2 by Yatharth Kochar · Wed Oct 14 15:27:24 2015 +0100
  49. 71c9a5e FWU: Add Generic Firmware Update framework support in BL1 by Yatharth Kochar · Sat Oct 10 19:06:53 2015 +0100
  50. a65be2f Add descriptor based image management support in BL1 by Yatharth Kochar · Fri Oct 09 18:06:13 2015 +0100
  51. 6c0566c Move context management code to common location by Yatharth Kochar · Fri Oct 02 17:56:48 2015 +0100
  52. 57d334c Remove `RUN_IMAGE` usage as opcode passed to next EL. by Yatharth Kochar · Thu Oct 29 12:47:02 2015 +0000
  53. 18a6204 Replace build macro WARN_DEPRECATED with ERROR_DEPRECATED by Soby Mathew · Mon Oct 26 14:29:21 2015 +0000
  54. b2e224c Introduce print_entry_point_info() function by Sandrine Bailleux · Mon Sep 28 17:03:06 2015 +0100
  55. ec813f5 Use standard errno definitions in load_auth_image() by Juan Castillo · Thu Oct 01 18:37:40 2015 +0100
  56. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · Fri Sep 11 16:03:13 2015 +0100
  57. ceb0d0f Ensure BL2 security state is secure by Vikram Kanigiri · Thu Jul 23 11:16:28 2015 +0100
  58. b7bf710 Merge pull request #368 from jcastillo-arm/jc/genfw/1126 by danh-arm · Fri Aug 21 15:28:30 2015 +0100
  59. 97dbcf1 TBB: abort boot if BL3-2 cannot be authenticated by Juan Castillo · Mon Aug 17 10:43:27 2015 +0100
  60. eb3bbf1 PSCI: Add documentation and fix plat_is_my_cpu_primary() by Soby Mathew · Mon Jun 08 12:32:50 2015 +0100
  61. 3700a92 PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · Mon Jul 13 11:21:11 2015 +0100
  62. 70716d6 PSCI: Add deprecated API for SPD when compatibility is disabled by Soby Mathew · Mon Jul 13 16:26:11 2015 +0100
  63. 981487a PSCI: Switch to the new PSCI frameworks by Soby Mathew · Mon Jul 13 14:10:57 2015 +0100
  64. b0082d2 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · Thu Apr 09 13:40:55 2015 +0100
  65. a08a5e7 TBB: switch to the new authentication framework by Juan Castillo · Tue May 19 11:54:12 2015 +0100
  66. 9b265a8 TBB: add TBBR Chain of Trust by Juan Castillo · Thu May 07 14:52:44 2015 +0100
  67. 3a66aca Use numbers to identify images instead of names by Juan Castillo · Mon Apr 13 17:36:19 2015 +0100
  68. 4534c64 Bug fix: Build time condition to relocate RW data by Sandrine Bailleux · Wed Jun 24 15:26:39 2015 +0100
  69. acde8b0 Rationalize reset handling code by Sandrine Bailleux · Tue May 19 11:54:45 2015 +0100
  70. 81899f1 Remove FIRST_RESET_HANDLER_CALL build option by Sandrine Bailleux · Wed May 27 17:14:22 2015 +0100
  71. f05c1b5 Add linker symbol declarations to bl_common.h by Dan Handley · Mon Apr 27 11:49:22 2015 +0100
  72. ea59668 Add header guards to asm macro files by Dan Handley · Wed Apr 01 17:34:24 2015 +0100
  73. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  74. 356d59d Merge pull request #269 from vikramkanigiri/vk/common-cci by danh-arm · Tue Mar 17 14:28:48 2015 +0000
  75. 725b133 Add macro to calculate number of elements in an array by Vikram Kanigiri · Wed Mar 04 10:34:27 2015 +0000
  76. 8723adf Enable type-checking of arguments passed to printf() et al. by Sandrine Bailleux · Thu Feb 05 15:42:31 2015 +0000
  77. 13f6a93 TBB: add authentication module interface by Juan Castillo · Tue Jan 13 10:37:27 2015 +0000
  78. 379954c TBB: add support to include certificates in a FIP image by Juan Castillo · Tue Nov 04 17:36:40 2014 +0000
  79. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · Thu Nov 20 18:09:41 2014 +0000
  80. 1218f11 Rework use of labels in assembly macros. by Soby Mathew · Tue Aug 19 11:26:00 2014 +0100
  81. cba2c50 Add concept of console output log levels by Dan Handley · Fri Aug 08 14:36:42 2014 +0100
  82. 5cd545d Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · Mon Jul 28 14:33:44 2014 +0100
  83. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · Thu Jun 05 09:45:36 2014 +0100
  84. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · Wed Jun 25 10:07:40 2014 +0100
  85. 041f62a Implement an assert() callable from assembly code by Soby Mathew · Mon Jul 14 16:58:03 2014 +0100
  86. 066f713 Introduce crash console APIs for crash reporting by Soby Mathew · Mon Jul 14 16:57:23 2014 +0100
  87. 04be3a5 Add support for printing version at runtime by Juan Castillo · Mon Jun 30 11:41:46 2014 +0100
  88. afe7e2f Implement a leaner printf for Trusted Firmware by Soby Mathew · Thu Jun 12 17:23:58 2014 +0100
  89. 467d057 Remove concept of top/bottom image loading by Sandrine Bailleux · Tue Jun 24 14:02:34 2014 +0100
  90. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · Wed Jun 04 21:10:52 2014 +0100
  91. 7ce42df Move BL porting functions into platform.h by Dan Handley · Thu May 15 14:11:36 2014 +0100
  92. a17fefa Remove extern keyword from function declarations by Dan Handley · Wed May 14 12:38:32 2014 +0100
  93. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · Thu Apr 24 11:02:16 2014 +0100
  94. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · Fri May 16 18:48:12 2014 +0100
  95. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · Tue Apr 15 18:08:08 2014 +0100
  96. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · Thu May 15 18:27:15 2014 +0100
  97. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · Tue May 13 14:42:08 2014 +0100
  98. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · Mon Apr 07 15:28:55 2014 +0100
  99. 6bdfa91 Merge pull request #58 from athoelke/optimise-cache-flush-v2 by danh-arm · Thu May 08 12:01:10 2014 +0100
  100. 6a5b3a4 Optimise data cache clean/invalidate operation by Andrew Thoelke · Fri Apr 25 10:49:30 2014 +0100