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git01.mediatek.com / filogic / atf / 604f0a4a513db782ad4ca431457a5c84107078d3 / include / common
  1. 14fabd0 Fix MISRA defects in log helpers by Antonio Nino Diaz · Tue Aug 28 11:44:44 2018 +0100
  2. c28fe76 Merge pull request #1542 from antonio-nino-diaz-arm/an/bl31-misra by Dimitris Papastamos · Thu Aug 30 16:18:49 2018 +0100
  3. 38b4ce0 Fix MISRA defects in some common headers by Antonio Nino Diaz · Tue Aug 21 14:14:31 2018 +0100
  4. d587646 backtrace: Print backtrace in assert() and panic() by Antonio Nino Diaz · Thu Aug 23 15:13:58 2018 +0100
  5. 7741463 backtrace: Introduce backtrace function by Douglas Raillard · Tue Aug 21 12:54:45 2018 +0100
  6. c0c8eb6 libc: Move tf_printf and tf_snprintf to libc by Antonio Nino Diaz · Wed Aug 15 17:02:28 2018 +0100
  7. f440708 tf_printf: Return number of printed characters by Antonio Nino Diaz · Wed Aug 15 16:52:32 2018 +0100
  8. 4b32e62 libc: Fix all includes in codebase by Antonio Nino Diaz · Thu Aug 16 16:52:57 2018 +0100
  9. 210f0a8 SiP: MISRA fixes for execution state switch by Jeenu Viswambharan · Thu Aug 02 10:14:12 2018 +0100
  10. e92111a Add support for romlib in the build system by Roberto Vargas · Tue May 22 16:05:42 2018 +0100
  11. bf789e7 Run compiler on debug macros for type checking by Sandrine Bailleux · Wed Jun 20 14:50:48 2018 +0200
  12. 95f30ab Add end_vector_entry assembler macro by Roberto Vargas · Tue Apr 17 11:31:43 2018 +0100
  13. 59385d0 Remove .func and .endfunc assembler directives by Roberto Vargas · Tue Apr 17 11:31:43 2018 +0100
  14. 1a6feae Merge pull request #1429 from jeenu-arm/mmu-direct by Dimitris Papastamos · Wed Jun 27 12:59:47 2018 +0100
  15. 58e8148 xlat v2: Split MMU setup and enable by Jeenu Viswambharan · Fri Apr 27 15:06:57 2018 +0100
  16. 5f658c3 Document ep_info attribute flags by Antonio Nino Diaz · Tue Jun 26 21:42:51 2018 +0100
  17. 4f3b6ed Fix MISRA Rule 5.3 Part 1 by Daniel Boulby · Fri May 04 11:18:26 2018 +0100
  18. 8f7c287 Merge pull request #1386 from soby-mathew/sm/dyn_bl31 by Dimitris Papastamos · Wed May 23 12:45:13 2018 +0100
  19. 3cc3917 Correct some typo errors in comment by Qixiang Xu · Mon Mar 05 09:31:11 2018 +0800
  20. 9fe8804 Allow disabling authentication dynamically by Soby Mathew · Mon Mar 26 12:43:37 2018 +0100
  21. 9a7ce2f AArch64: Introduce RAS handling by Jeenu Viswambharan · Wed Apr 04 16:07:11 2018 +0100
  22. 35c8cfc Add support for the SMC Calling Convention 2.0 by Antonio Nino Diaz · Mon Apr 23 15:43:29 2018 +0100
  23. 09f51d4 Merge pull request #1357 from antonio-nino-diaz-arm/an/fix-misra by Dimitris Papastamos · Wed Apr 18 10:54:26 2018 +0100
  24. e881147 Fix some MISRA defects in SPM code by Antonio Nino Diaz · Tue Apr 17 15:10:18 2018 +0100
  25. b72de19 Merge pull request #1356 from robertovargas-arm/misra-changes by Dimitris Papastamos · Mon Apr 16 15:04:28 2018 +0100
  26. be126ed Fix MISRA rule 8.3 Part 4 by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  27. 54f5d67 fix instruction address range limitation by Jiafei Pan · Tue Mar 27 23:00:55 2018 +0800
  28. 43a7bf4 Add support for BL2 in XIP memory by Jiafei Pan · Wed Mar 21 07:20:09 2018 +0000
  29. 5cc3bc8 Clean usage of void pointers to access symbols by Joel Hutton · Wed Mar 21 11:40:57 2018 +0000
  30. 3c817f4 Rename 'smcc' to 'smccc' by Antonio Nino Diaz · Wed Mar 21 10:49:27 2018 +0000
  31. 2ca18d9 Fix MISRA rule 8.4 Part 1 by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  32. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  33. 777dd43 Fix MISRA rule 8.3 in common code by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  34. cc36484 Dynamic cfg: MISRA fixes by Soby Mathew · Wed Feb 21 01:16:39 2018 +0000
  35. 96a1c6b ARM Platforms: Load HW_CONFIG in BL2 by Soby Mathew · Mon Jan 15 14:45:33 2018 +0000
  36. b9fccca Dynamic cfg: Introduce fdt wrappers by Soby Mathew · Mon Nov 06 13:56:40 2017 +0000
  37. 40eb4b6 Add dynamic config image IDs by Soby Mathew · Mon Jan 08 13:36:49 2018 +0000
  38. 0bdfef0 Dynamic cfg: Add HW and TB_FW configs to CoT by Soby Mathew · Tue Nov 07 17:03:57 2017 +0000
  39. 7814a95 Merge pull request #1173 from etienne-lms/armv7-qemu by davidcunado-arm · Wed Feb 07 11:57:19 2018 +0800
  40. 094041d aarch32: use lr as bl32 boot argument on aarch32 only systems by Etienne Carriere · Fri Feb 02 13:16:18 2018 +0100
  41. 18f65db image_decompress: add APIs for decompressing images by Masahiro Yamada · Fri Jan 26 11:42:01 2018 +0900
  42. 04285cf Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · Thu Jan 25 00:06:50 2018 +0000
  43. d79d40d Merge pull request #1193 from jwerner-chromium/JW_coreboot by davidcunado-arm · Wed Jan 24 14:31:53 2018 +0000
  44. b5d1f8e Merge pull request #1200 from robertovargas-arm/bl2-el3 by davidcunado-arm · Fri Jan 19 13:40:12 2018 +0000
  45. 0a4cded sp_min: Implement workaround for CVE-2017-5715 by Dimitris Papastamos · Tue Jan 02 11:37:02 2018 +0000
  46. e4e342d Mark functions defined in assembly files by Roberto Vargas · Thu Nov 02 16:36:51 2017 +0000
  47. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · Mon Oct 30 14:43:43 2017 +0000
  48. 446f7f1 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · Thu Nov 30 14:53:53 2017 +0000
  49. 94f8907 Add new function-pointer-based console API by Julius Werner · Mon Jul 31 18:15:11 2017 -0700
  50. 4213a3f Merge pull request #1178 from davidcunado-arm/dc/enable_sve by davidcunado-arm · Mon Dec 11 12:29:47 2017 +0000
  51. 7c8af06 Unify cache flush code path after image load by Soby Mathew · Fri Nov 10 13:14:40 2017 +0000
  52. ce88eee Enable SVE for Non-secure world by David Cunado · Fri Oct 20 11:30:57 2017 +0100
  53. 42ef554 Merge pull request #1145 from etienne-lms/rfc-armv7-2 by davidcunado-arm · Thu Nov 23 23:41:24 2017 +0000
  54. 5bdbb47 Refactor Statistical Profiling Extensions implementation by Dimitris Papastamos · Fri Oct 13 12:06:06 2017 +0100
  55. c41f206 SPM: Introduce Secure Partition Manager by Antonio Nino Diaz · Tue Oct 24 10:07:35 2017 +0100
  56. 4cce835 ARMv7 may not support Virtualization Extensions by Etienne Carriere · Wed Nov 08 14:38:33 2017 +0100
  57. 863858b ARMv7 does not support SDCR by Etienne Carriere · Sun Nov 05 22:55:55 2017 +0100
  58. 70b1c2f ARMv7 does not support STL instruction by Etienne Carriere · Sun Nov 05 22:55:47 2017 +0100
  59. aeb267c GIC: Allow specifying interrupt properties by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  60. aaf15f5 Implement log framework by Soby Mathew · Mon Sep 04 11:49:29 2017 +0100
  61. f583a06 Introduce tf_vprintf() and tf_string_print() by Soby Mathew · Mon Sep 04 11:45:52 2017 +0100
  62. e94b06d Merge pull request #1078 from douglas-raillard-arm/dr/add_cfi_vector_entry by davidcunado-arm · Thu Sep 07 00:45:59 2017 +0100
  63. 878f03c Merge pull request #1019 from etienne-lms/log-size by davidcunado-arm · Thu Sep 07 00:40:59 2017 +0100
  64. 97ad6ce cpu log buffer size depends on cache line size by Etienne Carriere · Fri Sep 01 10:22:20 2017 +0200
  65. efa50b5 Add CFI debug info to vector entries by Douglas Raillard · Mon Aug 07 16:20:46 2017 +0100
  66. be1d3ef asm_macros: set the default assembly code alignment to 4 byte by Masahiro Yamada · Thu Aug 31 14:29:34 2017 +0900
  67. b4c75e9 Add new alignment parameter to func assembler macro by Julius Werner · Tue Aug 01 15:16:36 2017 -0700
  68. 8072678 Support Trusted OS firmware extra images in TF tools by Summer Qin · Thu Apr 20 16:28:39 2017 +0100
  69. ee3457b aarch64: Enable Statistical Profiling Extensions for lower ELs by dp-arm · Tue May 23 09:32:49 2017 +0100
  70. fee8653 Fully initialise essential control registers by David Cunado · Thu Apr 13 22:38:29 2017 +0100
  71. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · Thu May 25 18:04:48 2017 -0700
  72. 34e7843 Merge pull request #949 from antonio-nino-diaz-arm/an/printf-memory by davidcunado-arm · Tue May 30 10:56:47 2017 +0100
  73. 9c107fa Introduce `tf_snprintf` by Antonio Nino Diaz · Wed May 17 15:34:22 2017 +0100
  74. e3a2b31 fip: move headers shared between TF and fiptool to include/tools_share by Masahiro Yamada · Mon May 08 18:29:03 2017 +0900
  75. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  76. 7d99b6c Merge branch 'integration' into tf_issue_461 by Scott Branden · Sat Apr 29 08:36:12 2017 -0700
  77. bf404c0 Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · Mon Apr 10 11:45:52 2017 -0700
  78. bf360df Merge pull request #910 from dp-arm/dp/AArch32-juno-port by davidcunado-arm · Fri Apr 21 17:10:27 2017 +0100
  79. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · Thu Nov 10 16:17:51 2016 +0000
  80. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · Thu Apr 20 09:58:28 2017 +0100
  81. 18e6004 Merge pull request #886 from dp-arm/dp/stack-protector by davidcunado-arm · Thu Apr 06 10:20:47 2017 +0100
  82. 306593d Add support for GCC stack protection by Douglas Raillard · Fri Feb 24 18:14:15 2017 +0000
  83. b911cc7 Re-factor header files for easier PSCI library integration by Soby Mathew · Mon Feb 13 12:46:28 2017 +0000
  84. 88de358 Merge pull request #841 from dp-arm/dp/debug-regs by danh-arm · Mon Feb 20 13:58:48 2017 +0000
  85. 595d0d5 Disable secure self-hosted debug via MDCR_EL3/SDCR by dp-arm · Wed Feb 08 11:51:50 2017 +0000
  86. 21362a9 Introduce unified API to zero memory by Douglas Raillard · Fri Dec 02 13:51:54 2016 +0000
  87. 54ec86a Allow spin locks to be defined from assembly by Jeenu Viswambharan · Thu Jan 19 14:23:36 2017 +0000
  88. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · Sun Dec 25 23:36:24 2016 +0900
  89. 2b7d7ae Merge pull request #791 from jeenu-arm/asm-assert-32 by danh-arm · Tue Dec 20 17:00:32 2016 +0000
  90. b0e529b Export is_mem_free() function by Sandrine Bailleux · Tue Nov 08 14:27:10 2016 +0000
  91. ff640c4 AArch32: Print ASM_ASSERT and panic messages by Jeenu Viswambharan · Mon Nov 28 09:59:27 2016 +0000
  92. 975d08c Merge pull request #774 from jeenu-arm/no-return-macro by danh-arm · Mon Dec 12 14:29:01 2016 +0000
  93. 68aef10 Define and use no_ret macro where no return is expected by Jeenu Viswambharan · Wed Nov 30 15:21:11 2016 +0000
  94. c14b08e Reset EL2 and EL3 configurable controls by David Cunado · Fri Nov 25 00:21:59 2016 +0000
  95. 1c0e208 Add CFI debug frame information for ASM functions by Douglas Raillard · Mon Nov 21 14:12:32 2016 +0000
  96. 5f55e28 Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR by David Cunado · Mon Oct 31 17:37:34 2016 +0000
  97. c44c5af AArch32: Add `memcpy4` function in assembly by Yatharth Kochar · Wed Sep 28 11:00:05 2016 +0100
  98. 89256b8 PSCI: Introduce PSCI Library argument structure by Soby Mathew · Tue Sep 13 14:19:08 2016 +0100
  99. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · Tue Jun 28 16:58:26 2016 +0100
  100. 3345a8d Add new version of image loading. by Yatharth Kochar · Mon Sep 12 16:08:41 2016 +0100