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filogic
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atf
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5ff5eeec5d087ef453d38ed1d5c9061c2f8ae563
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include
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common
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aarch64
dc9fab1
Remove all other deprecated interfaces and files
by Antonio Nino Diaz
· Tue Sep 25 09:39:51 2018 +0100
9ef94a9
PSCI: Remove platform compatibility layer
by Roberto Vargas
· Mon Sep 24 17:14:46 2018 +0100
95f30ab
Add end_vector_entry assembler macro
by Roberto Vargas
· Tue Apr 17 11:31:43 2018 +0100
59385d0
Remove .func and .endfunc assembler directives
by Roberto Vargas
· Tue Apr 17 11:31:43 2018 +0100
58e8148
xlat v2: Split MMU setup and enable
by Jeenu Viswambharan
· Fri Apr 27 15:06:57 2018 +0100
3cc3917
Correct some typo errors in comment
by Qixiang Xu
· Mon Mar 05 09:31:11 2018 +0800
9a7ce2f
AArch64: Introduce RAS handling
by Jeenu Viswambharan
· Wed Apr 04 16:07:11 2018 +0100
54f5d67
fix instruction address range limitation
by Jiafei Pan
· Tue Mar 27 23:00:55 2018 +0800
43a7bf4
Add support for BL2 in XIP memory
by Jiafei Pan
· Wed Mar 21 07:20:09 2018 +0000
d79d40d
Merge pull request #1193 from jwerner-chromium/JW_coreboot
by davidcunado-arm
· Wed Jan 24 14:31:53 2018 +0000
b5d1f8e
Merge pull request #1200 from robertovargas-arm/bl2-el3
by davidcunado-arm
· Fri Jan 19 13:40:12 2018 +0000
e0e9946
bl2-el3: Add BL2_EL3 image
by Roberto Vargas
· Mon Oct 30 14:43:43 2017 +0000
446f7f1
Workaround for CVE-2017-5715 on Cortex A57 and A72
by Dimitris Papastamos
· Thu Nov 30 14:53:53 2017 +0000
94f8907
Add new function-pointer-based console API
by Julius Werner
· Mon Jul 31 18:15:11 2017 -0700
ce88eee
Enable SVE for Non-secure world
by David Cunado
· Fri Oct 20 11:30:57 2017 +0100
5bdbb47
Refactor Statistical Profiling Extensions implementation
by Dimitris Papastamos
· Fri Oct 13 12:06:06 2017 +0100
c41f206
SPM: Introduce Secure Partition Manager
by Antonio Nino Diaz
· Tue Oct 24 10:07:35 2017 +0100
efa50b5
Add CFI debug info to vector entries
by Douglas Raillard
· Mon Aug 07 16:20:46 2017 +0100
ee3457b
aarch64: Enable Statistical Profiling Extensions for lower ELs
by dp-arm
· Tue May 23 09:32:49 2017 +0100
fee8653
Fully initialise essential control registers
by David Cunado
· Thu Apr 13 22:38:29 2017 +0100
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
306593d
Add support for GCC stack protection
by Douglas Raillard
· Fri Feb 24 18:14:15 2017 +0000
88de358
Merge pull request #841 from dp-arm/dp/debug-regs
by danh-arm
· Mon Feb 20 13:58:48 2017 +0000
595d0d5
Disable secure self-hosted debug via MDCR_EL3/SDCR
by dp-arm
· Wed Feb 08 11:51:50 2017 +0000
21362a9
Introduce unified API to zero memory
by Douglas Raillard
· Fri Dec 02 13:51:54 2016 +0000
54ec86a
Allow spin locks to be defined from assembly
by Jeenu Viswambharan
· Thu Jan 19 14:23:36 2017 +0000
441bfdd
Use #ifdef for IMAGE_BL* instead of #if
by Masahiro Yamada
· Sun Dec 25 23:36:24 2016 +0900
68aef10
Define and use no_ret macro where no return is expected
by Jeenu Viswambharan
· Wed Nov 30 15:21:11 2016 +0000
5f55e28
Reset debug registers MDCR-EL3/SDCR and MDCR_EL2/HDCR
by David Cunado
· Mon Oct 31 17:37:34 2016 +0000
b9ff2fd
Rearrange assembly helper macros
by Soby Mathew
· Fri Jul 08 15:26:35 2016 +0100
0d78607
Introduce `el3_runtime` and `PSCI` libraries
by Soby Mathew
· Thu Mar 24 16:56:29 2016 +0000