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filogic
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atf
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5ea57a529bf955a98a6b17c3226df5ce8601d214
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lib
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cpus
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aarch64
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cortex_a57.S
aa2c029
Cortex-A57: Implement workaround for erratum 817169
by Ambroise Vincent
· 5 years ago
1b0db76
Cortex-A57: Implement workaround for erratum 814670
by Ambroise Vincent
· 5 years ago
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· 6 years ago
bb0aa39
cpulib: Add ISBs or comment why they are unneeded
by Dimitris Papastamos
· 6 years ago
ba51d9e
Add support for dynamic mitigation for CVE-2018-3639
by Dimitris Papastamos
· 6 years ago
e6625ec
Implement static workaround for CVE-2018-3639
by Dimitris Papastamos
· 6 years ago
570c06a
Rename symbols and files relating to CVE-2017-5715
by Dimitris Papastamos
· 6 years ago
914757c
Fixup `SMCCC_ARCH_FEATURES` semantics
by Dimitris Papastamos
· 6 years ago
858bd61
Print erratum application report for CVE-2017-5715
by Dimitris Papastamos
· 7 years ago
446f7f1
Workaround for CVE-2017-5715 on Cortex A57 and A72
by Dimitris Papastamos
· 7 years ago
0c9bd27
Cortex-A57: Implement workaround for erratum 859972
by Eleanor Bonnici
· 7 years ago
41b61be
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· 7 years ago
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· 7 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 7 years ago
3f13c35
Apply workaround for errata 813419 of Cortex-A57
by Antonio Nino Diaz
· 7 years ago
d5ec367
Report errata workaround status to console
by Jeenu Viswambharan
· 8 years ago
ee5eb80
Add provision to extend CPU operations at more levels
by Jeenu Viswambharan
· 8 years ago
6a72a91
bl31: Add error reporting registers
by Naga Sureshkumar Relli
· 8 years ago
143ef1a
Add support for Cortex-A57 erratum 833471 workaround
by Sandrine Bailleux
· 8 years ago
adcbd55
Add support for Cortex-A57 erratum 826977 workaround
by Sandrine Bailleux
· 8 years ago
48cbe85
Add support for Cortex-A57 erratum 829520 workaround
by Sandrine Bailleux
· 8 years ago
c11116f
Add support for Cortex-A57 erratum 828024 workaround
by Sandrine Bailleux
· 8 years ago
a7e0c53
Add support for Cortex-A57 erratum 826974 workaround
by Sandrine Bailleux
· 8 years ago
6b28c57
Make cpu operations warning a VERBOSE print
by Soby Mathew
· 8 years ago
f12a31d
Cortex-Axx: Unconditionally apply CPU reset operations
by Sandrine Bailleux
· 9 years ago
d481759
Disable non-temporal hint on Cortex-A53/57
by Sandrine Bailleux
· 9 years ago
a877c25
Add support to indicate size and end of assembly functions
by Kévin Petit
· 9 years ago
b5a6304
Fix the Cortex-A57 reset handler register usage
by Soby Mathew
· 10 years ago
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· 10 years ago
937488b
Optimize Cortex-A57 cluster power down sequence on Juno
by Soby Mathew
· 10 years ago
1604fa0
Optimize barrier usage during Cortex-A57 power down
by Soby Mathew
· 10 years ago
c088433
Apply errata workarounds only when major/minor revisions match.
by Soby Mathew
· 10 years ago
42aa5eb
Add support for level specific cache maintenance operations
by Soby Mathew
· 10 years ago
802f865
Add support for selected Cortex-A57 errata workarounds
by Soby Mathew
· 10 years ago
38b4bc9
Add CPU specific crash reporting handlers
by Soby Mathew
· 10 years ago
8e2f287
Add CPU specific power management operations
by Soby Mathew
· 10 years ago
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· 10 years ago
[Renamed (82%) from lib/aarch64/cpu_helpers.S]
c61399b
Merge pull request #191 from danh-arm/jc/tf-issues/218
by danh-arm
· 10 years ago