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bl1
b0fd008
Move BL1 and BL2 private defines to bl_common.h
by Antonio Nino Diaz
· Tue Dec 18 13:49:46 2018 +0000
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· Fri Dec 14 00:18:21 2018 +0000
5eb8837
Standardise header guards across codebase
by Antonio Nino Diaz
· Thu Nov 08 10:20:19 2018 +0000
864ca6f
context_mgmt: Fix MISRA defects
by Antonio Nino Diaz
· Wed Oct 31 15:25:35 2018 +0000
a8083a6
Merge pull request #1584 from danielboulby-arm/db/Switches
by Soby Mathew
· Wed Oct 03 15:36:37 2018 +0100
9164ec0
Remove deprecated bl1_init_bl2_mem_layout()
by Antonio Nino Diaz
· Mon Sep 24 17:26:25 2018 +0100
025946a
Remove build option LOAD_IMAGE_V2
by Roberto Vargas
· Mon Sep 24 17:20:48 2018 +0100
8942a1b
Ensure the flow through switch statements is clear
by Daniel Boulby
· Fri Jun 22 14:16:03 2018 +0100
4b32e62
libc: Fix all includes in codebase
by Antonio Nino Diaz
· Thu Aug 16 16:52:57 2018 +0100
4daa1de
DSU erratum 936184 workaround
by John Tsichritzis
· Mon Jul 23 09:11:59 2018 +0100
d40b5f9
Merge pull request #1510 from robertovargas-arm/romlib
by Dimitris Papastamos
· Mon Aug 13 13:02:16 2018 +0100
128de8d
xlat v2: Support the EL2 translation regime
by Antonio Nino Diaz
· Tue Aug 07 19:59:49 2018 +0100
502290b
Create a library file for libmbedtls
by Roberto Vargas
· Tue May 08 10:27:10 2018 +0100
b3b6e22
Fix some violations to MISRA rule 8.3
by Sandrine Bailleux
· Wed Jul 11 12:44:22 2018 +0200
95f30ab
Add end_vector_entry assembler macro
by Roberto Vargas
· Tue Apr 17 11:31:43 2018 +0100
1d04c63
Add .extab and .exidx sections
by Roberto Vargas
· Thu May 10 11:01:16 2018 +0100
d93fde3
Use ALIGN instead of NEXT in linker scripts
by Roberto Vargas
· Wed Apr 11 11:53:31 2018 +0100
eace8f1
Make TF UUID RFC 4122 compliant
by Roberto Vargas
· Thu Apr 26 13:36:53 2018 +0100
52f707f
Fix MISRA rule 8.4 Part 4
by Roberto Vargas
· Mon Feb 12 12:36:17 2018 +0000
be126ed
Fix MISRA rule 8.3 Part 4
by Roberto Vargas
· Mon Feb 12 12:36:17 2018 +0000
2257d6d
Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements
by Dimitris Papastamos
· Thu Mar 29 13:20:05 2018 +0100
5cc3bc8
Clean usage of void pointers to access symbols
by Joel Hutton
· Wed Mar 21 11:40:57 2018 +0000
d5ff96c
bl1: fix switch statements to comply with MISRA rules
by Jonathan Wright
· Tue Mar 13 13:54:03 2018 +0000
3c817f4
Rename 'smcc' to 'smccc'
by Antonio Nino Diaz
· Wed Mar 21 10:49:27 2018 +0000
b8d8145
Merge pull request #1282 from robertovargas-arm/misra-changes
by davidcunado-arm
· Wed Feb 28 18:53:30 2018 +0000
bcfaeff
Fix MISRA rule 8.8 in common code
by Roberto Vargas
· Mon Feb 12 12:36:17 2018 +0000
9c274f8
Merge pull request #1286 from antonio-nino-diaz-arm/an/mmu-mismatch
by davidcunado-arm
· Wed Feb 28 01:26:21 2018 +0000
7c2a3ca
Add comments about mismatched TCR_ELx and xlat tables
by Antonio Nino Diaz
· Fri Feb 23 15:07:54 2018 +0000
6e16a33
BL1: Deprecate the `bl1_init_bl2_mem_layout()` API
by Soby Mathew
· Wed Jan 10 12:51:34 2018 +0000
2f38ce3
Add image_id to bl1_plat_handle_post/pre_image_load()
by Soby Mathew
· Thu Feb 08 17:45:12 2018 +0000
eb24dff
Ensure the correct execution of TLBI instructions
by Antonio Nino Diaz
· Mon Feb 19 13:53:48 2018 +0000
7814a95
Merge pull request #1173 from etienne-lms/armv7-qemu
by davidcunado-arm
· Wed Feb 07 11:57:19 2018 +0800
094041d
aarch32: use lr as bl32 boot argument on aarch32 only systems
by Etienne Carriere
· Fri Feb 02 13:16:18 2018 +0100
43d20b3
bl1: add bl1_plat_handle_{pre,post}_image_load()
by Masahiro Yamada
· Thu Feb 01 16:46:18 2018 +0900
9f41248
bl2-el3: Don't compile BL1 when BL2_AT_EL3 is defined in FVP
by Roberto Vargas
· Tue Jan 16 10:35:23 2018 +0000
2ce2b09
Replace magic numbers in linkerscripts by PAGE_SIZE
by Antonio Nino Diaz
· Wed Nov 15 11:45:35 2017 +0000
9930501
Fix order of #includes
by Isla Mitchell
· Tue Jul 11 14:54:08 2017 +0100
09bb548
Merge pull request #978 from etienne-lms/minor-build
by danh-arm
· Wed Jun 28 13:46:19 2017 +0100
320c332
Merge pull request #994 from soby-mathew/sm/fwu_fix
by davidcunado-arm
· Mon Jun 26 09:54:24 2017 +0100
ba7c3d5
bl1: include bl1_private.h in aarch* files
by Etienne Carriere
· Wed Jun 07 16:41:50 2017 +0200
662bf93
context_mgmt: declare extern cm_set_next_context() for AArch32
by Etienne Carriere
· Fri Jun 23 09:37:49 2017 +0200
bfe12d3
bl: security_state should be of type unsigned int
by Etienne Carriere
· Wed Jun 07 16:45:42 2017 +0200
fee8653
Fully initialise essential control registers
by David Cunado
· Thu Apr 13 22:38:29 2017 +0100
f088b34
Fix issues in FWU code
by Soby Mathew
· Thu Jun 15 16:11:48 2017 +0100
0e8e720
FWU: Introduce FWU_SMC_IMAGE_RESET
by Antonio Nino Diaz
· Fri May 12 16:51:59 2017 +0100
d6a277f
FWU: Check for overlaps when loading images
by Antonio Nino Diaz
· Thu Jun 01 13:40:17 2017 +0100
cdd03cb
AArch32: Add `TRUSTED_BOARD_BOOT` support
by dp-arm
· Wed Feb 15 11:07:55 2017 +0000
f3e3a43
AArch32: Rework SMC context save and restore mechanism
by Soby Mathew
· Thu Mar 30 14:42:54 2017 +0100
6715485
Merge pull request #927 from jeenu-arm/state-switch
by davidcunado-arm
· Thu May 11 16:04:52 2017 +0100
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
2a9b882
Add macro to check whether the CPU implements an EL
by Jeenu Viswambharan
· Tue Feb 21 14:40:44 2017 +0000
e7c7911
Merge pull request #907 from antonio-nino-diaz-arm/an/smc-ret0
by davidcunado-arm
· Wed Apr 26 11:56:40 2017 +0100
3759e3f
Control inclusion of helper code used for asserts
by Antonio Nino Diaz
· Wed Mar 22 15:48:51 2017 +0000
acb2914
tspd:FWU:Fix usage of SMC_RET0
by Antonio Nino Diaz
· Tue Apr 04 17:08:32 2017 +0100
6460924
Merge pull request #885 from antonio-nino-diaz-arm/an/console-flush
by davidcunado-arm
· Wed Apr 12 22:23:44 2017 +0100
306593d
Add support for GCC stack protection
by Douglas Raillard
· Fri Feb 24 18:14:15 2017 +0000
e3962d0
Flush console where necessary
by Antonio Nino Diaz
· Thu Feb 16 16:17:19 2017 +0000
230011c
Move plat/common source file definitions to generic Makefiles
by dp-arm
· Tue Mar 07 11:02:47 2017 +0000
21362a9
Introduce unified API to zero memory
by Douglas Raillard
· Fri Dec 02 13:51:54 2016 +0000
d5ec367
Report errata workaround status to console
by Jeenu Viswambharan
· Tue Jan 03 11:01:51 2017 +0000
b39d75f
Fix integer overflows in BL1 FWU code
by Sandrine Bailleux
· Fri Nov 11 16:44:37 2016 +0000
bbc0822
Add some debug assertions in BL1 FWU copy code
by Sandrine Bailleux
· Mon Nov 14 14:58:05 2016 +0000
953488e
bl1_fwu_image_copy() refactoring
by Sandrine Bailleux
· Mon Nov 14 14:56:51 2016 +0000
5ebc21e
Minor refactoring of BL1 FWU code
by Sandrine Bailleux
· Fri Nov 11 15:56:20 2016 +0000
8c0177f
Enable TRUSTED_BOARD_BOOT support for LOAD_IMAGE_V2=1
by Yatharth Kochar
· Fri Nov 11 13:57:50 2016 +0000
68aef10
Define and use no_ret macro where no return is expected
by Jeenu Viswambharan
· Wed Nov 30 15:21:11 2016 +0000
64abad2
AArch32: Fix detection of virtualization support
by Yatharth Kochar
· Fri Sep 23 10:48:29 2016 +0100
5d36121
AArch32: Add generic changes in BL1
by Yatharth Kochar
· Tue Jun 28 17:07:09 2016 +0100
51f76f6
Changes for new version of image loading in BL1/BL2
by Yatharth Kochar
· Mon Sep 12 16:10:33 2016 +0100
3a59e99
Merge pull request #689 from yatharth-arm/yk/plat_report_expn
by davidcunado-arm
· Wed Aug 31 14:36:20 2016 +0100
47b0fe3
Remove looping around `plat_report_exception`
by Yatharth Kochar
· Wed Aug 17 11:10:16 2016 +0100
c53ac5e
Move SIZE_FROM_LOG2_WORDS macro to utils.h
by Soby Mathew
· Wed Jul 20 14:38:36 2016 +0100
0d78607
Introduce `el3_runtime` and `PSCI` libraries
by Soby Mathew
· Thu Mar 24 16:56:29 2016 +0000
f91f144
Introduce SEPARATE_CODE_AND_RODATA build flag
by Sandrine Bailleux
· Fri Jul 08 14:37:40 2016 +0100
6c2daed
BL1: Add linker symbol identifying end of ROM content
by Sandrine Bailleux
· Wed Jun 15 13:53:50 2016 +0100
a913dee
Merge pull request #636 from soby-mathew/sm/cpu_ctx_rem_aarch32_regs
by danh-arm
· Fri Jun 03 15:12:37 2016 +0100
d75d2ba
Build option to include AArch32 registers in cpu context
by Soby Mathew
· Tue May 17 14:01:32 2016 +0100
9e6ad6c
Introduce some helper macros for exception vectors
by Sandrine Bailleux
· Tue May 24 16:56:03 2016 +0100
632d6df
Enable asynchronous abort exceptions during boot
by Gerald Lejeune
· Tue Mar 22 09:29:23 2016 +0100
f11b29a
Fix the inconsistencies in bl1_tbbr_image_descs[]
by Yatharth Kochar
· Mon Feb 01 11:04:46 2016 +0000
5f671cd
Merge pull request #470 from danh-arm/dh/fwu-done-fix
by danh-arm
· Tue Dec 15 16:12:10 2015 +0000
89f8f33
FWU: Pass client cookie to FWU_SMC_UPDATE_DONE
by Dan Handley
· Tue Dec 15 14:28:24 2015 +0000
8ec7652
FWU: Remove image_id arg from FWU_SMC_IMAGE_RESUME
by Dan Handley
· Tue Dec 15 10:52:33 2015 +0000
ac6f7a5
Merge pull request #468 from danh-arm/dh/fwu-tweaks
by danh-arm
· Mon Dec 14 18:24:48 2015 +0000
35e5f69
FWU: Fix secure memory check in image auth
by Dan Handley
· Mon Dec 14 16:26:43 2015 +0000
7d19941
Remove dashes from image names: 'BL3-x' --> 'BL3x'
by Juan Castillo
· Mon Dec 14 09:35:25 2015 +0000
71c9a5e
FWU: Add Generic Firmware Update framework support in BL1
by Yatharth Kochar
· Sat Oct 10 19:06:53 2015 +0100
a65be2f
Add descriptor based image management support in BL1
by Yatharth Kochar
· Fri Oct 09 18:06:13 2015 +0100
6c0566c
Move context management code to common location
by Yatharth Kochar
· Fri Oct 02 17:56:48 2015 +0100
57d334c
Remove `RUN_IMAGE` usage as opcode passed to next EL.
by Yatharth Kochar
· Thu Oct 29 12:47:02 2015 +0000
b21b02f
Introduce COLD_BOOT_SINGLE_CPU build option
by Sandrine Bailleux
· Fri Oct 30 15:05:17 2015 +0000
87322b3
Pass the entry point info to bl1_plat_prepare_exit()
by Sandrine Bailleux
· Tue Nov 10 15:01:57 2015 +0000
b7e97c4
Introduce SPIN_ON_BL1_EXIT build flag
by Sandrine Bailleux
· Tue Nov 10 10:01:19 2015 +0000
33c95cc
Improve display_boot_progress() function
by Sandrine Bailleux
· Tue Oct 27 15:52:33 2015 +0000
b2e224c
Introduce print_entry_point_info() function
by Sandrine Bailleux
· Mon Sep 28 17:03:06 2015 +0100
26ae583
Add optional platform error handler API
by Juan Castillo
· Fri Sep 25 15:41:14 2015 +0100
d1413b2
Add optional bl1_plat_prepare_exit() API
by Juan Castillo
· Mon Oct 05 16:59:38 2015 +0100
1626946
Break down BL1 AArch64 synchronous exception handler
by Sandrine Bailleux
· Tue Sep 29 13:38:20 2015 +0100
ceb0d0f
Ensure BL2 security state is secure
by Vikram Kanigiri
· Thu Jul 23 11:16:28 2015 +0100
a08a5e7
TBB: switch to the new authentication framework
by Juan Castillo
· Tue May 19 11:54:12 2015 +0100
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